mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-20 00:48:52 +09:00
![Siva Durga Prasad Paladugu](/assets/img/avatar_default.png)
Add PL bitstream dowload support for ZynqMP Bitstream will be validated by uboot and loaded to PL by invoking an smc instruction to ATF which route this request to PMU FW which will take care of loading it to PL Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
21 lines
446 B
Plaintext
21 lines
446 B
Plaintext
menu "FPGA support"
|
|
|
|
config FPGA
|
|
bool
|
|
|
|
config FPGA_XILINX
|
|
bool "Enable Xilinx FPGA drivers"
|
|
select FPGA
|
|
help
|
|
Enable Xilinx FPGA specific functions which includes bitstream
|
|
(in BIT format), fpga and device validation.
|
|
|
|
config FPGA_ZYNQMPPL
|
|
bool "Enable Xilinx FPGA driver for ZynqMP"
|
|
depends on FPGA_XILINX
|
|
help
|
|
Enable FPGA driver for loading bitstream in BIT and BIN format
|
|
on Xilinx Zynq UltraScale+ (ZynqMP) device.
|
|
|
|
endmenu
|