u-boot-brain/include/asm-mips/cachectl.h
wdenk 6069ff2653 * Add support for 16 MB flash configuration of TRAB board
* Patch by Erwin Rol, 27 Feb 2003:
  Add support for RTEMS

* Add image information to README

* Fix dual PCMCIA slot support (when running with just one
  slot populated)

* Add VFD type detection to trab board

* extend drivers/cs8900.c driver to synchronize  ethaddr  environment
  variable with value in the EEPROM

* Start adding MIPS support files
2003-02-28 00:49:47 +00:00

25 lines
658 B
C

/*
* cachectl.h -- defines for MIPS cache control system calls
*
* Copyright (C) 1994, 1995, 1996 by Ralf Baechle
*/
#ifndef __ASM_MIPS_CACHECTL
#define __ASM_MIPS_CACHECTL
/*
* Options for cacheflush system call
*/
#define ICACHE (1<<0) /* flush instruction cache */
#define DCACHE (1<<1) /* writeback and flush data cache */
#define BCACHE (ICACHE|DCACHE) /* flush both caches */
/*
* Caching modes for the cachectl(2) call
*
* cachectl(2) is currently not supported and returns ENOSYS.
*/
#define CACHEABLE 0 /* make pages cacheable */
#define UNCACHEABLE 1 /* make pages uncacheable */
#endif /* __ASM_MIPS_CACHECTL */