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https://github.com/brain-hackers/u-boot-brain
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![Stelian Pop](/assets/img/avatar_default.png)
At least some (old ?) versions of the AT91Bootstrap do not set up the PLLB correctly to 48 MHz in order to make USB host function correctly. This patch sets up the PLLB to the same values Linux uses, and makes USB work ok on the following CPUs: - AT91CAP9 - AT91SAM9260 - AT91SAM9263 This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all the relevant AT91CAP9/AT91SAM9 atmel boards. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
171 lines
5.0 KiB
C
171 lines
5.0 KiB
C
/*
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* (C) Copyright 2008 Sergey Lapin <slapin@ossfans.org>
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*
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* Configuation settings for the AFEB9260 board.
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* Based on configuration for AT91SAM9260-EK
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* ARM asynchronous clock */
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#define AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */
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#define AT91_MASTER_CLOCK 89999598 /* peripheral = main / 2 */
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#define CFG_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */
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#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
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#define AT91_SLOW_CLOCK 32768 /* slow clock */
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#define CONFIG_AT91SAM9260 1 /* It's an Atmel AT91SAM9260 SoC*/
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#define CONFIG_AFEB9260 1 /* on an AFEB9260 Board */
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SKIP_RELOCATE_UBOOT
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/*
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* Hardware drivers
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*/
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#define CONFIG_ATMEL_USART 1
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#undef CONFIG_USART0
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#undef CONFIG_USART1
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#undef CONFIG_USART2
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#define CONFIG_USART3 1 /* USART 3 is DBGU */
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#define CONFIG_BOOTDELAY 3
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE 1
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#define CONFIG_BOOTP_BOOTPATH 1
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#define CONFIG_BOOTP_GATEWAY 1
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#define CONFIG_BOOTP_HOSTNAME 1
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_BDI
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#undef CONFIG_CMD_IMI
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#undef CONFIG_CMD_AUTOSCRIPT
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_LOADS
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#undef CONFIG_CMD_IMLS
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#define CONFIG_CMD_PING 1
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#define CONFIG_CMD_DHCP 1
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#define CONFIG_CMD_NAND 1
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#define CONFIG_CMD_USB 1
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/* SDRAM */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM 0x20000000
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#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
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/* DataFlash */
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#define CONFIG_HAS_DATAFLASH 1
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#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
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#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */
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#define AT91_SPI_CLK 15000000
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#define DATAFLASH_TCSS (0x1a << 16)
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#define DATAFLASH_TCHS (0x1 << 24)
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/* NAND flash */
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#define NAND_MAX_CHIPS 1
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#define CONFIG_SYS_NAND_DBW_8 1
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/* NOR flash - no real flash on this board */
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#define CONFIG_SYS_NO_FLASH 1
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/* Ethernet */
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#define CONFIG_MACB 1
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#undef CONFIG_RMII /* We have full MII there */
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#define CONFIG_RESET_PHY_R 1
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#define CONFIG_NET_MULTI 1
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#define CONFIG_NET_RETRY_COUNT 20
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/* USB */
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#define CONFIG_USB_OHCI_NEW 1
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#define LITTLEENDIAN 1
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#define CONFIG_DOS_PARTITION 1
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#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
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#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
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#define CONFIG_USB_STORAGE 1
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#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* load address */
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
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#define CONFIG_SYS_MEMTEST_END 0x21e00000
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#undef CONFIG_SYS_USE_DATAFLASH_CS0
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#define CONFIG_SYS_USE_DATAFLASH_CS1 1
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#undef CONFIG_SYS_USE_NANDFLASH
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/* bootstrap + u-boot + env + linux in dataflash on CS1 */
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#define CONFIG_ENV_IS_IN_DATAFLASH 1
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#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400)
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#define CONFIG_ENV_OFFSET 0x4200
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#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET)
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#define CONFIG_ENV_SIZE 0x4200
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#define CONFIG_BOOTCOMMAND "nand read 0x21000000 0xa0000 0x200000; bootm"
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#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
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"root=/dev/mtdblock2 " \
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"rw rootfstype=jffs2 panic=20"
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
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#define CONFIG_SYS_PROMPT "U-Boot> "
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CFG_LONGHELP 1
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#define CONFIG_CMDLINE_EDITING 1
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#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
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#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
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#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#error CONFIG_USE_IRQ not supported
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#endif
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#endif
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