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https://github.com/brain-hackers/u-boot-brain
synced 2024-09-08 05:43:21 +09:00
![Klaus Goger](/assets/img/avatar_default.png)
Generate a MAC address based on the cpuid available in the efuse block: Use the first 6 byte of the cpuid's SHA256 hash and set the locally administered bits. Also ensure that the multicast bit is cleared. The MAC address is only generated and set if there is no ethaddr present in the saved environment. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
214 lines
4.6 KiB
C
214 lines
4.6 KiB
C
/*
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* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <misc.h>
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#include <ram.h>
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#include <dm/pinctrl.h>
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#include <dm/uclass-internal.h>
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#include <misc.h>
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#include <asm/setup.h>
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#include <asm/arch/periph.h>
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#include <power/regulator.h>
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#include <u-boot/sha256.h>
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#define RK3399_CPUID_OFF 0x7
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#define RK3399_CPUID_LEN 0x10
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DECLARE_GLOBAL_DATA_PTR;
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#define RK3399_CPUID_OFF 0x7
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#define RK3399_CPUID_LEN 0x10
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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struct udevice *pinctrl, *regulator;
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int ret;
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/*
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* The PWM does not have decicated interrupt number in dts and can
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* not get periph_id by pinctrl framework, so let's init them here.
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* The PWM2 and PWM3 are for pwm regulators.
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*/
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ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
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if (ret) {
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debug("%s: Cannot find pinctrl device\n", __func__);
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goto out;
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}
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ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2);
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if (ret) {
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debug("%s PWM2 pinctrl init fail!\n", __func__);
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goto out;
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}
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/* rk3399 need to init vdd_center to get the correct output voltage */
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ret = regulator_get_by_platname("vdd_center", ®ulator);
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if (ret)
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debug("%s: Cannot get vdd_center regulator\n", __func__);
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ret = regulator_get_by_platname("vcc5v0_host", ®ulator);
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if (ret) {
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debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
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goto out;
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}
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ret = regulator_set_enable(regulator, true);
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if (ret) {
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debug("%s vcc5v0-host-en set fail!\n", __func__);
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goto out;
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}
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out:
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return 0;
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}
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static void setup_macaddr(void)
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{
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#if CONFIG_IS_ENABLED(CMD_NET)
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int ret;
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const char *cpuid = getenv("cpuid#");
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u8 hash[SHA256_SUM_LEN];
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int size = sizeof(hash);
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u8 mac_addr[6];
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/* Only generate a MAC address, if none is set in the environment */
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if (getenv("ethaddr"))
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return;
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if (!cpuid) {
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debug("%s: could not retrieve 'cpuid#'\n", __func__);
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return;
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}
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ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash, &size);
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if (ret) {
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debug("%s: failed to calculate SHA256\n", __func__);
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return;
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}
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/* Copy 6 bytes of the hash to base the MAC address on */
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memcpy(mac_addr, hash, 6);
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/* Make this a valid MAC address and set it */
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mac_addr[0] &= 0xfe; /* clear multicast bit */
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mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
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eth_setenv_enetaddr("ethaddr", mac_addr);
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#endif
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return;
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}
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static void setup_serial(void)
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{
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#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE)
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struct udevice *dev;
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int ret, i;
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u8 cpuid[RK3399_CPUID_LEN];
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u8 low[RK3399_CPUID_LEN/2], high[RK3399_CPUID_LEN/2];
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char cpuid_str[RK3399_CPUID_LEN * 2 + 1];
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u64 serialno;
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char serialno_str[16];
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/* retrieve the device */
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ret = uclass_get_device_by_driver(UCLASS_MISC,
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DM_GET_DRIVER(rockchip_efuse), &dev);
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if (ret) {
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debug("%s: could not find efuse device\n", __func__);
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return;
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}
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/* read the cpu_id range from the efuses */
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ret = misc_read(dev, RK3399_CPUID_OFF, &cpuid, sizeof(cpuid));
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if (ret) {
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debug("%s: reading cpuid from the efuses failed\n",
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__func__);
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return;
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}
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memset(cpuid_str, 0, sizeof(cpuid_str));
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for (i = 0; i < 16; i++)
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sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
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debug("cpuid: %s\n", cpuid_str);
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/*
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* Mix the cpuid bytes using the same rules as in
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* ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c
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*/
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for (i = 0; i < 8; i++) {
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low[i] = cpuid[1 + (i << 1)];
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high[i] = cpuid[i << 1];
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}
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serialno = crc32_no_comp(0, low, 8);
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serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
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snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
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setenv("cpuid#", cpuid_str);
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setenv("serial#", serialno_str);
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#endif
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return;
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}
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int misc_init_r(void)
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{
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setup_serial();
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setup_macaddr();
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return 0;
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}
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#ifdef CONFIG_SERIAL_TAG
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void get_board_serial(struct tag_serialnr *serialnr)
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{
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char *serial_string;
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u64 serial = 0;
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serial_string = getenv("serial#");
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if (serial_string)
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serial = simple_strtoull(serial_string, NULL, 16);
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serialnr->high = (u32)(serial >> 32);
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serialnr->low = (u32)(serial & 0xffffffff);
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}
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#endif
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int dram_init(void)
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{
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struct ram_info ram;
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struct udevice *dev;
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int ret;
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ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (ret) {
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debug("DRAM init failed: %d\n", ret);
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return ret;
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}
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ret = ram_get_info(dev, &ram);
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if (ret) {
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debug("Cannot get DRAM size: %d\n", ret);
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return ret;
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}
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debug("SDRAM base=%llx, size=%x\n", ram.base, (unsigned int)ram.size);
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gd->ram_size = ram.size;
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return 0;
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}
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int dram_init_banksize(void)
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{
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/* Reserve 0x200000 for ATF bl31 */
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gd->bd->bi_dram[0].start = 0x200000;
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gd->bd->bi_dram[0].size = 0x7e000000;
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return 0;
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}
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