mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-09 19:53:53 +09:00
fb2dea60e8
With this change Synopsys DesignWare SDP board is switched to driver model for both serial port (serial_dw) and Ethernet (Designware GMAC). This simplifies include/configs/axs101.h and allows for reuse of Linux's Device Tree description. For simplicity Linux's .dts files are not blindly copied but only very few extracts of them are really used (those that are supported in U-Boot at the moment). Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
77 lines
1.6 KiB
C
77 lines
1.6 KiB
C
/*
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* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dwmmc.h>
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#include <malloc.h>
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#include "axs10x.h"
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DECLARE_GLOBAL_DATA_PTR;
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int board_mmc_init(bd_t *bis)
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{
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struct dwmci_host *host = NULL;
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host = malloc(sizeof(struct dwmci_host));
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if (!host) {
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printf("dwmci_host malloc fail!\n");
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return 1;
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}
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memset(host, 0, sizeof(struct dwmci_host));
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host->name = "Synopsys Mobile storage";
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host->ioaddr = (void *)ARC_DWMMC_BASE;
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host->buswidth = 4;
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host->dev_index = 0;
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host->bus_hz = 50000000;
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add_dwmci(host, host->bus_hz / 2, 400000);
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return 0;
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}
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#define AXS_MB_CREG 0xE0011000
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int board_early_init_f(void)
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{
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if (readl((void __iomem *)AXS_MB_CREG + 0x234) & (1 << 28))
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gd->board_type = AXS_MB_V3;
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else
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gd->board_type = AXS_MB_V2;
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return 0;
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}
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#ifdef CONFIG_ISA_ARCV2
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#define RESET_VECTOR_ADDR 0x0
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void smp_set_core_boot_addr(unsigned long addr, int corenr)
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{
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/* All cores have reset vector pointing to 0 */
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writel(addr, (void __iomem *)RESET_VECTOR_ADDR);
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/* Make sure other cores see written value in memory */
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flush_dcache_range(RESET_VECTOR_ADDR, RESET_VECTOR_ADDR + sizeof(int));
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}
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void smp_kick_all_cpus(void)
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{
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/* CPU start CREG */
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#define AXC003_CREG_CPU_START 0xF0001400
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/* Bits positions in CPU start CREG */
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#define BITS_START 0
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#define BITS_POLARITY 8
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#define BITS_CORE_SEL 9
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#define BITS_MULTICORE 12
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#define CMD (1 << BITS_MULTICORE) | (1 << BITS_CORE_SEL) | \
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(1 << BITS_POLARITY) | (1 << BITS_START)
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writel(CMD, (void __iomem *)AXC003_CREG_CPU_START);
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}
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#endif
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