Andre Przywara 1ef923851a ARM: add C function to switch to non-secure state ... The core specific part of the work is done in the assembly routine in nonsec_virt.S, introduced with the previous patch, but for the full glory we need to setup the GIC distributor interface once for the whole system, which is done in C here. The routine is placed in arch/arm/cpu/armv7 to allow easy access from other ARMv7 boards. We check the availability of the security extensions first. Since we need a safe way to access the GIC, we use the PERIPHBASE registers on Cortex-A15 and A7 CPUs and do some sanity checks. Boards not implementing the CBAR can override this value via a configuration file variable. Then we actually do the GIC enablement: a) enable the GIC distributor, both for non-secure and secure state (GICD_CTLR[1:0] = 11b) b) allow all interrupts to be handled from non-secure state (GICD_IGROUPRn = 0xFFFFFFFF) The core specific GIC setup is then done in the assembly routine. Signed-off-by: Andre Przywara <andre.przywara@linaro.org>		2013-10-03 21:28:43 +02:00
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cpu	ARM: add C function to switch to non-secure state	2013-10-03 21:28:43 +02:00
dts	Merge branch 'master' of git://git.denx.de/u-boot-arm	2013-07-12 10:36:48 -04:00
imx-common	Merge git://git.denx.de/u-boot-arm	2013-07-31 11:30:38 +02:00
include/asm	ARM: add C function to switch to non-secure state	2013-10-03 21:28:43 +02:00
lib	ARM: use r9 for gd	2013-09-23 18:00:02 +02:00
config.mk	ARM: use r9 for gd	2013-09-23 18:00:02 +02:00