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https://github.com/brain-hackers/u-boot-brain
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1ebbb77a19
These new values are: - enables UART0 and UART1 pins in MPP - define some L2 cache settings - changes a SDRAM timing to better fit the hardware - removed three writes that were the same as the reset values Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Heiko Schocher <hs@denx.de> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> |
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common | ||
km83xx | ||
km_arm | ||
mgcoge |