mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-16 23:18:51 +09:00
![Masahiro Yamada](/assets/img/avatar_default.png)
U-Boot widely uses error() as a bit noisier variant of printf(). This macro causes name conflict with the following line in include/linux/compiler-gcc.h: # define __compiletime_error(message) __attribute__((error(message))) This prevents us from using __compiletime_error(), and makes it difficult to fully sync BUILD_BUG macros with Linux. (Notice Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().) Let's convert error() into now treewide-available pr_err(). Done with the help of Coccinelle, excluing tools/ directory. The semantic patch I used is as follows: // <smpl> @@@@ -error +pr_err (...) // </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Re-run Coccinelle] Signed-off-by: Tom Rini <trini@konsulko.com>
184 lines
4.3 KiB
C
184 lines
4.3 KiB
C
/*
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* (C) Copyright 2017, Fuzhou Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* Rockchip SARADC driver for U-Boot
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*/
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#include <common.h>
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#include <adc.h>
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#include <clk.h>
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#include <dm.h>
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#include <errno.h>
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#include <asm/io.h>
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#define SARADC_CTRL_CHN_MASK GENMASK(2, 0)
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#define SARADC_CTRL_POWER_CTRL BIT(3)
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#define SARADC_CTRL_IRQ_ENABLE BIT(5)
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#define SARADC_CTRL_IRQ_STATUS BIT(6)
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#define SARADC_TIMEOUT (100 * 1000)
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struct rockchip_saradc_regs {
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unsigned int data;
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unsigned int stas;
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unsigned int ctrl;
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unsigned int dly_pu_soc;
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};
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struct rockchip_saradc_data {
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int num_bits;
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int num_channels;
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unsigned long clk_rate;
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};
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struct rockchip_saradc_priv {
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struct rockchip_saradc_regs *regs;
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int active_channel;
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const struct rockchip_saradc_data *data;
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};
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int rockchip_saradc_channel_data(struct udevice *dev, int channel,
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unsigned int *data)
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{
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struct rockchip_saradc_priv *priv = dev_get_priv(dev);
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struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
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if (channel != priv->active_channel) {
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pr_err("Requested channel is not active!");
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return -EINVAL;
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}
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if ((readl(&priv->regs->ctrl) & SARADC_CTRL_IRQ_STATUS) !=
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SARADC_CTRL_IRQ_STATUS)
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return -EBUSY;
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/* Read value */
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*data = readl(&priv->regs->data);
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*data &= uc_pdata->data_mask;
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/* Power down adc */
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writel(0, &priv->regs->ctrl);
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return 0;
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}
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int rockchip_saradc_start_channel(struct udevice *dev, int channel)
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{
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struct rockchip_saradc_priv *priv = dev_get_priv(dev);
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if (channel < 0 || channel >= priv->data->num_channels) {
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pr_err("Requested channel is invalid!");
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return -EINVAL;
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}
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/* 8 clock periods as delay between power up and start cmd */
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writel(8, &priv->regs->dly_pu_soc);
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/* Select the channel to be used and trigger conversion */
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writel(SARADC_CTRL_POWER_CTRL | (channel & SARADC_CTRL_CHN_MASK) |
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SARADC_CTRL_IRQ_ENABLE, &priv->regs->ctrl);
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priv->active_channel = channel;
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return 0;
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}
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int rockchip_saradc_stop(struct udevice *dev)
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{
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struct rockchip_saradc_priv *priv = dev_get_priv(dev);
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/* Power down adc */
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writel(0, &priv->regs->ctrl);
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priv->active_channel = -1;
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return 0;
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}
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int rockchip_saradc_probe(struct udevice *dev)
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{
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struct rockchip_saradc_priv *priv = dev_get_priv(dev);
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struct clk clk;
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int ret;
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ret = clk_get_by_index(dev, 0, &clk);
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if (ret)
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return ret;
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ret = clk_set_rate(&clk, priv->data->clk_rate);
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if (IS_ERR_VALUE(ret))
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return ret;
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priv->active_channel = -1;
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return 0;
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}
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int rockchip_saradc_ofdata_to_platdata(struct udevice *dev)
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{
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struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
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struct rockchip_saradc_priv *priv = dev_get_priv(dev);
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struct rockchip_saradc_data *data;
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data = (struct rockchip_saradc_data *)dev_get_driver_data(dev);
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priv->regs = (struct rockchip_saradc_regs *)dev_read_addr(dev);
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if (priv->regs == (struct rockchip_saradc_regs *)FDT_ADDR_T_NONE) {
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pr_err("Dev: %s - can't get address!", dev->name);
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return -ENODATA;
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}
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priv->data = data;
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uc_pdata->data_mask = (1 << priv->data->num_bits) - 1;;
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uc_pdata->data_format = ADC_DATA_FORMAT_BIN;
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uc_pdata->data_timeout_us = SARADC_TIMEOUT / 5;
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uc_pdata->channel_mask = (1 << priv->data->num_channels) - 1;
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return 0;
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}
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static const struct adc_ops rockchip_saradc_ops = {
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.start_channel = rockchip_saradc_start_channel,
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.channel_data = rockchip_saradc_channel_data,
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.stop = rockchip_saradc_stop,
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};
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static const struct rockchip_saradc_data saradc_data = {
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.num_bits = 10,
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.num_channels = 3,
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.clk_rate = 1000000,
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};
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static const struct rockchip_saradc_data rk3066_tsadc_data = {
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.num_bits = 12,
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.num_channels = 2,
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.clk_rate = 50000,
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};
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static const struct rockchip_saradc_data rk3399_saradc_data = {
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.num_bits = 10,
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.num_channels = 6,
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.clk_rate = 1000000,
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};
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static const struct udevice_id rockchip_saradc_ids[] = {
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{ .compatible = "rockchip,saradc",
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.data = (ulong)&saradc_data },
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{ .compatible = "rockchip,rk3066-tsadc",
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.data = (ulong)&rk3066_tsadc_data },
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{ .compatible = "rockchip,rk3399-saradc",
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.data = (ulong)&rk3399_saradc_data },
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{ }
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};
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U_BOOT_DRIVER(rockchip_saradc) = {
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.name = "rockchip_saradc",
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.id = UCLASS_ADC,
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.of_match = rockchip_saradc_ids,
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.ops = &rockchip_saradc_ops,
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.probe = rockchip_saradc_probe,
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.ofdata_to_platdata = rockchip_saradc_ofdata_to_platdata,
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.priv_auto_alloc_size = sizeof(struct rockchip_saradc_priv),
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};
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