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https://github.com/brain-hackers/u-boot-brain
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750df1979d
The serial port was being manually configured during SPL build, however in preparation to allow DM in SPL, this needs to change to be based on whether or not DM_SERIAL is enabled because, soon the assumption that SPL means no DM may not be accurate. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
70 lines
1.8 KiB
C
70 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* ti_omap3_common.h
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*
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* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
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*
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* For more details, please see the technical documents listed at
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* http://www.ti.com/product/omap3530
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* http://www.ti.com/product/omap3630
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* http://www.ti.com/product/dm3730
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*/
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#ifndef __CONFIG_TI_OMAP3_COMMON_H__
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#define __CONFIG_TI_OMAP3_COMMON_H__
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/*
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* High Level Configuration Options
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*/
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#include <asm/arch/cpu.h>
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#include <asm/arch/omap.h>
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/* Clock Defines */
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#define V_OSCK 26000000 /* Clock output from T2 */
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#define V_SCLK (V_OSCK >> 1)
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/* NS16550 Configuration */
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#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
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#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
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#if !defined(CONFIG_DM_SERIAL)
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#endif /* !CONFIG_DM_SERIAL */
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#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
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115200}
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/* Select serial console configuration */
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
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#define CONFIG_SYS_NS16550_COM2 OMAP34XX_UART2
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#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
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#endif
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/* Physical Memory Map */
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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/*
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* OMAP3 has 12 GP timers, they can be driven by the system clock
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* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
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* This rate is divided by a local divisor.
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*/
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#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
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#define CONFIG_SYS_MONITOR_LEN (256 << 10)
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/* SPL */
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#define CONFIG_SPL_TEXT_BASE 0x40200800
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#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
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(64 << 20))
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#ifdef CONFIG_NAND
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#define CONFIG_SYS_NAND_BASE 0x30000000
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#endif
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/* Now bring in the rest of the common code. */
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#include <configs/ti_armv7_omap.h>
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#endif /* __CONFIG_TI_OMAP3_COMMON_H__ */
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