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https://github.com/brain-hackers/u-boot-brain
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4e62642aef
Add a weak functions to save the vddcore voltage value provided in the OPP node when the clock tree is initialized. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
54 lines
1.3 KiB
C
54 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
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/*
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* Copyright (C) 2015-2017, STMicroelectronics - All Rights Reserved
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*/
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/* ID = Device Version (bit31:16) + Device Part Number (RPN) (bit7:0) */
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#define CPU_STM32MP157Cxx 0x05000000
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#define CPU_STM32MP157Axx 0x05000001
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#define CPU_STM32MP153Cxx 0x05000024
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#define CPU_STM32MP153Axx 0x05000025
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#define CPU_STM32MP151Cxx 0x0500002E
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#define CPU_STM32MP151Axx 0x0500002F
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#define CPU_STM32MP157Fxx 0x05000080
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#define CPU_STM32MP157Dxx 0x05000081
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#define CPU_STM32MP153Fxx 0x050000A4
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#define CPU_STM32MP153Dxx 0x050000A5
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#define CPU_STM32MP151Fxx 0x050000AE
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#define CPU_STM32MP151Dxx 0x050000AF
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/* return CPU_STMP32MP...Xxx constants */
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u32 get_cpu_type(void);
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#define CPU_DEV_STM32MP15 0x500
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/* return CPU_DEV constants */
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u32 get_cpu_dev(void);
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#define CPU_REVA 0x1000
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#define CPU_REVB 0x2000
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#define CPU_REVZ 0x2001
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/* return CPU_REV constants */
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u32 get_cpu_rev(void);
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/* Get Package options from OTP */
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u32 get_cpu_package(void);
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#define PKG_AA_LBGA448 4
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#define PKG_AB_LBGA354 3
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#define PKG_AC_TFBGA361 2
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#define PKG_AD_TFBGA257 1
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/* Get SOC name */
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#define SOC_NAME_SIZE 20
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void get_soc_name(char name[SOC_NAME_SIZE]);
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/* return boot mode */
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u32 get_bootmode(void);
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int setup_mac_address(void);
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/* board power management : configure vddcore according OPP */
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void board_vddcore_init(u32 voltage_mv);
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