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https://github.com/brain-hackers/u-boot-brain
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6f2e0ad194
This commit adds cpufreq support on stm32mp15x SOC. STM32 cpufreq uses operating points V2 bindings (no legacy). Nvmem cells have to be used to know the chip version and then which OPPs are available. Note that STM32 cpufreq driver is mainly based on "cpufreq-dt" driver. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
377 lines
7.6 KiB
Plaintext
377 lines
7.6 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) STMicroelectronics 2017 - All Rights Reserved
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* Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
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*/
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/dts-v1/;
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#include "stm32mp157.dtsi"
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#include "stm32mp15xc.dtsi"
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#include "stm32mp15-pinctrl.dtsi"
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#include "stm32mp15xxaa-pinctrl.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/mfd/st,stpmic1.h>
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/ {
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model = "STMicroelectronics STM32MP157C eval daughter";
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compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@c0000000 {
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device_type = "memory";
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reg = <0xC0000000 0x40000000>;
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};
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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mcuram2: mcuram2@10000000 {
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compatible = "shared-dma-pool";
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reg = <0x10000000 0x40000>;
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no-map;
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};
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vdev0vring0: vdev0vring0@10040000 {
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compatible = "shared-dma-pool";
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reg = <0x10040000 0x1000>;
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no-map;
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};
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vdev0vring1: vdev0vring1@10041000 {
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compatible = "shared-dma-pool";
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reg = <0x10041000 0x1000>;
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no-map;
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};
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vdev0buffer: vdev0buffer@10042000 {
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compatible = "shared-dma-pool";
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reg = <0x10042000 0x4000>;
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no-map;
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};
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mcuram: mcuram@30000000 {
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compatible = "shared-dma-pool";
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reg = <0x30000000 0x40000>;
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no-map;
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};
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retram: retram@38000000 {
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compatible = "shared-dma-pool";
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reg = <0x38000000 0x10000>;
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no-map;
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};
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gpu_reserved: gpu@e8000000 {
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reg = <0xe8000000 0x8000000>;
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no-map;
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};
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};
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aliases {
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serial0 = &uart4;
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};
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sd_switch: regulator-sd_switch {
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compatible = "regulator-gpio";
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regulator-name = "sd_switch";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <2900000>;
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regulator-type = "voltage";
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regulator-always-on;
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gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>;
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gpios-states = <0>;
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states = <1800000 0x1>,
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<2900000 0x0>;
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};
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};
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&adc {
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/* ANA0, ANA1 are dedicated pins and don't need pinctrl: only in6. */
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pinctrl-0 = <&adc1_in6_pins_a>;
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pinctrl-names = "default";
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vdd-supply = <&vdd>;
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vdda-supply = <&vdda>;
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vref-supply = <&vdda>;
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status = "disabled";
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adc1: adc@0 {
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st,adc-channels = <0 1 6>;
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/* 16.5 ck_cycles sampling time */
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st,min-sample-time-nsecs = <400>;
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status = "okay";
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};
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};
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&cpu0{
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cpu-supply = <&vddcore>;
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};
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&cpu1{
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cpu-supply = <&vddcore>;
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};
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&dac {
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pinctrl-names = "default";
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pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
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vref-supply = <&vdda>;
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status = "disabled";
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dac1: dac@1 {
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status = "okay";
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};
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dac2: dac@2 {
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status = "okay";
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};
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};
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&dts {
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status = "okay";
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};
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&gpu {
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contiguous-area = <&gpu_reserved>;
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status = "okay";
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};
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&i2c4 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&i2c4_pins_a>;
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pinctrl-1 = <&i2c4_pins_sleep_a>;
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i2c-scl-rising-time-ns = <185>;
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i2c-scl-falling-time-ns = <20>;
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clock-frequency = <400000>;
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status = "okay";
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/* spare dmas for other usage */
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/delete-property/dmas;
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/delete-property/dma-names;
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pmic: stpmic@33 {
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compatible = "st,stpmic1";
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reg = <0x33>;
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interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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status = "okay";
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regulators {
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compatible = "st,stpmic1-regulators";
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ldo1-supply = <&v3v3>;
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ldo2-supply = <&v3v3>;
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ldo3-supply = <&vdd_ddr>;
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ldo5-supply = <&v3v3>;
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ldo6-supply = <&v3v3>;
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pwr_sw1-supply = <&bst_out>;
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pwr_sw2-supply = <&bst_out>;
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vddcore: buck1 {
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regulator-name = "vddcore";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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regulator-initial-mode = <0>;
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regulator-over-current-protection;
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};
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vdd_ddr: buck2 {
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regulator-name = "vdd_ddr";
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regulator-min-microvolt = <1350000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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regulator-initial-mode = <0>;
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regulator-over-current-protection;
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};
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vdd: buck3 {
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regulator-name = "vdd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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st,mask-reset;
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regulator-initial-mode = <0>;
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regulator-over-current-protection;
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};
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v3v3: buck4 {
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regulator-name = "v3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-over-current-protection;
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regulator-initial-mode = <0>;
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};
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vdda: ldo1 {
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regulator-name = "vdda";
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regulator-min-microvolt = <2900000>;
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regulator-max-microvolt = <2900000>;
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interrupts = <IT_CURLIM_LDO1 0>;
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};
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v2v8: ldo2 {
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regulator-name = "v2v8";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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interrupts = <IT_CURLIM_LDO2 0>;
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};
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vtt_ddr: ldo3 {
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regulator-name = "vtt_ddr";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <750000>;
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regulator-always-on;
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regulator-over-current-protection;
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};
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vdd_usb: ldo4 {
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regulator-name = "vdd_usb";
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interrupts = <IT_CURLIM_LDO4 0>;
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};
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vdd_sd: ldo5 {
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regulator-name = "vdd_sd";
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regulator-min-microvolt = <2900000>;
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regulator-max-microvolt = <2900000>;
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interrupts = <IT_CURLIM_LDO5 0>;
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regulator-boot-on;
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};
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v1v8: ldo6 {
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regulator-name = "v1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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interrupts = <IT_CURLIM_LDO6 0>;
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};
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vref_ddr: vref_ddr {
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regulator-name = "vref_ddr";
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regulator-always-on;
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};
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bst_out: boost {
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regulator-name = "bst_out";
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interrupts = <IT_OCP_BOOST 0>;
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};
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vbus_otg: pwr_sw1 {
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regulator-name = "vbus_otg";
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interrupts = <IT_OCP_OTG 0>;
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};
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vbus_sw: pwr_sw2 {
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regulator-name = "vbus_sw";
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interrupts = <IT_OCP_SWOUT 0>;
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regulator-active-discharge = <1>;
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};
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};
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onkey {
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compatible = "st,stpmic1-onkey";
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interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
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interrupt-names = "onkey-falling", "onkey-rising";
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power-off-time-sec = <10>;
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status = "okay";
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};
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watchdog {
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compatible = "st,stpmic1-wdt";
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status = "disabled";
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};
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};
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};
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&ipcc {
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status = "okay";
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};
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&iwdg2 {
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timeout-sec = <32>;
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status = "okay";
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};
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&m4_rproc {
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memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
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<&vdev0vring1>, <&vdev0buffer>;
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mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
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mbox-names = "vq0", "vq1", "shutdown";
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interrupt-parent = <&exti>;
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interrupts = <68 1>;
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status = "okay";
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};
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&pwr_regulators {
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vdd-supply = <&vdd>;
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vdd_3v3_usbfs-supply = <&vdd_usb>;
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};
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&rng1 {
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status = "okay";
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};
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&rtc {
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status = "okay";
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};
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&sdmmc1 {
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pinctrl-names = "default", "opendrain", "sleep";
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pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
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pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
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pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
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cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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disable-wp;
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st,sig-dir;
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st,neg-edge;
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st,use-ckin;
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bus-width = <4>;
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vmmc-supply = <&vdd_sd>;
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vqmmc-supply = <&sd_switch>;
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status = "okay";
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};
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&sdmmc2 {
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pinctrl-names = "default", "opendrain", "sleep";
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pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
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pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
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pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
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non-removable;
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no-sd;
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no-sdio;
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st,neg-edge;
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bus-width = <8>;
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vmmc-supply = <&v3v3>;
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vqmmc-supply = <&vdd>;
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mmc-ddr-3_3v;
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status = "okay";
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};
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&timers6 {
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status = "okay";
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/* spare dmas for other usage */
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/delete-property/dmas;
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/delete-property/dma-names;
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timer@5 {
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status = "okay";
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};
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};
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart4_pins_a>;
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status = "okay";
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};
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&usbotg_hs {
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vbus-supply = <&vbus_otg>;
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};
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&usbphyc_port0 {
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phy-supply = <&vdd_usb>;
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};
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&usbphyc_port1 {
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phy-supply = <&vdd_usb>;
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};
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