mirror of
https://github.com/brain-hackers/u-boot-brain
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699c4e592b
Initially IVT for ARCv2 was simply copypasted from ARCompact with some selected fixes so basic stuff works. Now we update it with more ARCv2 specific vectors like * Software Interrupt * Division by zero * Data cache consistency error * Misaligned access Also normal interrupts are now implemented properly and extened to all possible 240 items. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
33 lines
1.0 KiB
ArmAsm
33 lines
1.0 KiB
ArmAsm
/*
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* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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.section .ivt, "a",@progbits
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.align 4
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/* Critical system events */
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.word _start /* 0x00 - Reset */
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.word memory_error /* 0x01 - Memory Error */
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.word instruction_error /* 0x02 - Instruction Error */
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/* Exceptions */
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.word EV_MachineCheck /* 0x03 - Fatal Machine check */
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.word EV_TLBMissI /* 0x04 - Intruction TLB miss */
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.word EV_TLBMissD /* 0x05 - Data TLB miss */
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.word EV_TLBProtV /* 0x06 - Protection Violation or Misaligned Access */
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.word EV_PrivilegeV /* 0x07 - Privilege Violation */
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.word EV_SWI /* 0x08 - Software Interrupt */
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.word EV_Trap /* 0x09 - Trap */
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.word EV_Extension /* 0x0A - Extension Intruction Exception */
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.word EV_DivZero /* 0x0B - Division by Zero */
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.word EV_DCError /* 0x0C - Data cache consistency error */
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.word EV_Maligned /* 0x0D - Misaligned data access */
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.word 0 /* 0x0E - Unused */
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.word 0 /* 0x0F - Unused */
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/* Device interrupts */
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.rept 240
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.word interrupt_handler /* 0x10 - 0xFF */
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.endr
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