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https://github.com/brain-hackers/u-boot-brain
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a8ca5c8adb
The CONFIG_PHY_MARVELL has already been migrated to Kconfig (some boards already had it in their Kconfig), but had not been moved for older boards. Move it to the defconfigs for all boards. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
57 lines
1.5 KiB
C
57 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2015 Stefan Roese <sr@denx.de>
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*/
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#ifndef __CONFIG_SOCFPGA_SR1500_H__
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#define __CONFIG_SOCFPGA_SR1500_H__
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#include <asm/arch/base_addr_ac5.h>
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/* Memory configurations */
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#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SR1500 */
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/* Booting Linux */
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#define CONFIG_LOADADDR 0x01000000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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/* Ethernet on SoC (EMAC) */
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#define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII
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/* The PHY is autodetected, so no MII PHY address is needed here */
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#define PHY_ANEG_TIMEOUT 8000
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/* Environment */
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/* Enable SPI NOR flash reset, needed for SPI booting */
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#define CONFIG_SPI_N25Q256A_RESET
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/*
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* Bootcounter
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*/
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#define CONFIG_SYS_BOOTCOUNT_BE
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/* Environment setting for SPI flash */
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#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
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#define CONFIG_ENV_SECT_SIZE (64 * 1024)
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#define CONFIG_ENV_SIZE (16 * 1024)
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#define CONFIG_ENV_OFFSET 0x000e0000
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#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_SPI_BUS 0
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#define CONFIG_ENV_SPI_CS 0
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#define CONFIG_ENV_SPI_MODE SPI_MODE_3
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#define CONFIG_ENV_SPI_MAX_HZ 100000000 /* Use max of 100MHz */
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#define CONFIG_SF_DEFAULT_SPEED 100000000
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/*
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* The QSPI NOR flash layout on SR1500:
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*
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* 0000.0000 - 0003.ffff: SPL (4 times)
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* 0004.0000 - 000d.ffff: U-Boot
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* 000e.0000 - 000e.ffff: env1
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* 000f.0000 - 000f.ffff: env2
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*/
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/* The rest of the configuration is shared */
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#include <configs/socfpga_common.h>
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#endif /* __CONFIG_SOCFPGA_SR1500_H__ */
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