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https://github.com/brain-hackers/u-boot-brain
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![Simon Glass](/assets/img/avatar_default.png)
Update the i2c uclass to support a live device tree. Signed-off-by: Simon Glass <sjg@chromium.org>
536 lines
12 KiB
C
536 lines
12 KiB
C
/*
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* Copyright (c) 2014 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <i2c.h>
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#include <malloc.h>
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#include <dm/device-internal.h>
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#include <dm/lists.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define I2C_MAX_OFFSET_LEN 4
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/* Useful debugging function */
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void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs)
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{
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int i;
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for (i = 0; i < nmsgs; i++) {
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struct i2c_msg *m = &msg[i];
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printf(" %s %x len=%x", m->flags & I2C_M_RD ? "R" : "W",
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msg->addr, msg->len);
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if (!(m->flags & I2C_M_RD))
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printf(": %x", m->buf[0]);
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printf("\n");
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}
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}
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/**
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* i2c_setup_offset() - Set up a new message with a chip offset
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*
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* @chip: Chip to use
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* @offset: Byte offset within chip
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* @offset_buf: Place to put byte offset
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* @msg: Message buffer
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* @return 0 if OK, -EADDRNOTAVAIL if the offset length is 0. In that case the
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* message is still set up but will not contain an offset.
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*/
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static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset,
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uint8_t offset_buf[], struct i2c_msg *msg)
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{
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int offset_len;
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msg->addr = chip->chip_addr;
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msg->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
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msg->len = chip->offset_len;
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msg->buf = offset_buf;
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if (!chip->offset_len)
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return -EADDRNOTAVAIL;
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assert(chip->offset_len <= I2C_MAX_OFFSET_LEN);
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offset_len = chip->offset_len;
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while (offset_len--)
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*offset_buf++ = offset >> (8 * offset_len);
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return 0;
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}
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static int i2c_read_bytewise(struct udevice *dev, uint offset,
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uint8_t *buffer, int len)
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{
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struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
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struct udevice *bus = dev_get_parent(dev);
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struct dm_i2c_ops *ops = i2c_get_ops(bus);
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struct i2c_msg msg[2], *ptr;
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uint8_t offset_buf[I2C_MAX_OFFSET_LEN];
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int ret;
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int i;
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for (i = 0; i < len; i++) {
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if (i2c_setup_offset(chip, offset + i, offset_buf, msg))
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return -EINVAL;
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ptr = msg + 1;
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ptr->addr = chip->chip_addr;
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ptr->flags = msg->flags | I2C_M_RD;
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ptr->len = 1;
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ptr->buf = &buffer[i];
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ptr++;
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ret = ops->xfer(bus, msg, ptr - msg);
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if (ret)
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return ret;
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}
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return 0;
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}
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static int i2c_write_bytewise(struct udevice *dev, uint offset,
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const uint8_t *buffer, int len)
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{
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struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
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struct udevice *bus = dev_get_parent(dev);
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struct dm_i2c_ops *ops = i2c_get_ops(bus);
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struct i2c_msg msg[1];
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uint8_t buf[I2C_MAX_OFFSET_LEN + 1];
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int ret;
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int i;
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for (i = 0; i < len; i++) {
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if (i2c_setup_offset(chip, offset + i, buf, msg))
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return -EINVAL;
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buf[msg->len++] = buffer[i];
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ret = ops->xfer(bus, msg, 1);
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if (ret)
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return ret;
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}
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return 0;
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}
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int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len)
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{
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struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
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struct udevice *bus = dev_get_parent(dev);
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struct dm_i2c_ops *ops = i2c_get_ops(bus);
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struct i2c_msg msg[2], *ptr;
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uint8_t offset_buf[I2C_MAX_OFFSET_LEN];
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int msg_count;
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if (!ops->xfer)
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return -ENOSYS;
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if (chip->flags & DM_I2C_CHIP_RD_ADDRESS)
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return i2c_read_bytewise(dev, offset, buffer, len);
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ptr = msg;
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if (!i2c_setup_offset(chip, offset, offset_buf, ptr))
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ptr++;
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if (len) {
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ptr->addr = chip->chip_addr;
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ptr->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
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ptr->flags |= I2C_M_RD;
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ptr->len = len;
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ptr->buf = buffer;
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ptr++;
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}
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msg_count = ptr - msg;
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return ops->xfer(bus, msg, msg_count);
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}
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int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
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int len)
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{
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struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
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struct udevice *bus = dev_get_parent(dev);
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struct dm_i2c_ops *ops = i2c_get_ops(bus);
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struct i2c_msg msg[1];
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if (!ops->xfer)
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return -ENOSYS;
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if (chip->flags & DM_I2C_CHIP_WR_ADDRESS)
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return i2c_write_bytewise(dev, offset, buffer, len);
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/*
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* The simple approach would be to send two messages here: one to
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* set the offset and one to write the bytes. However some drivers
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* will not be expecting this, and some chips won't like how the
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* driver presents this on the I2C bus.
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*
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* The API does not support separate offset and data. We could extend
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* it with a flag indicating that there is data in the next message
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* that needs to be processed in the same transaction. We could
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* instead add an additional buffer to each message. For now, handle
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* this in the uclass since it isn't clear what the impact on drivers
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* would be with this extra complication. Unfortunately this means
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* copying the message.
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*
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* Use the stack for small messages, malloc() for larger ones. We
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* need to allow space for the offset (up to 4 bytes) and the message
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* itself.
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*/
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if (len < 64) {
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uint8_t buf[I2C_MAX_OFFSET_LEN + len];
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i2c_setup_offset(chip, offset, buf, msg);
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msg->len += len;
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memcpy(buf + chip->offset_len, buffer, len);
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return ops->xfer(bus, msg, 1);
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} else {
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uint8_t *buf;
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int ret;
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buf = malloc(I2C_MAX_OFFSET_LEN + len);
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if (!buf)
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return -ENOMEM;
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i2c_setup_offset(chip, offset, buf, msg);
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msg->len += len;
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memcpy(buf + chip->offset_len, buffer, len);
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ret = ops->xfer(bus, msg, 1);
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free(buf);
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return ret;
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}
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}
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int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)
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{
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struct udevice *bus = dev_get_parent(dev);
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struct dm_i2c_ops *ops = i2c_get_ops(bus);
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if (!ops->xfer)
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return -ENOSYS;
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return ops->xfer(bus, msg, nmsgs);
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}
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int dm_i2c_reg_read(struct udevice *dev, uint offset)
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{
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uint8_t val;
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int ret;
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ret = dm_i2c_read(dev, offset, &val, 1);
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if (ret < 0)
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return ret;
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return val;
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}
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int dm_i2c_reg_write(struct udevice *dev, uint offset, uint value)
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{
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uint8_t val = value;
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return dm_i2c_write(dev, offset, &val, 1);
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}
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/**
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* i2c_probe_chip() - probe for a chip on a bus
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*
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* @bus: Bus to probe
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* @chip_addr: Chip address to probe
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* @flags: Flags for the chip
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* @return 0 if found, -ENOSYS if the driver is invalid, -EREMOTEIO if the chip
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* does not respond to probe
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*/
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static int i2c_probe_chip(struct udevice *bus, uint chip_addr,
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enum dm_i2c_chip_flags chip_flags)
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{
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struct dm_i2c_ops *ops = i2c_get_ops(bus);
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struct i2c_msg msg[1];
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int ret;
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if (ops->probe_chip) {
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ret = ops->probe_chip(bus, chip_addr, chip_flags);
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if (!ret || ret != -ENOSYS)
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return ret;
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}
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if (!ops->xfer)
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return -ENOSYS;
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/* Probe with a zero-length message */
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msg->addr = chip_addr;
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msg->flags = chip_flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
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msg->len = 0;
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msg->buf = NULL;
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return ops->xfer(bus, msg, 1);
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}
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static int i2c_bind_driver(struct udevice *bus, uint chip_addr, uint offset_len,
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struct udevice **devp)
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{
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struct dm_i2c_chip *chip;
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char name[30], *str;
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struct udevice *dev;
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int ret;
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snprintf(name, sizeof(name), "generic_%x", chip_addr);
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str = strdup(name);
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if (!str)
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return -ENOMEM;
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ret = device_bind_driver(bus, "i2c_generic_chip_drv", str, &dev);
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debug("%s: device_bind_driver: ret=%d\n", __func__, ret);
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if (ret)
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goto err_bind;
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/* Tell the device what we know about it */
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chip = dev_get_parent_platdata(dev);
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chip->chip_addr = chip_addr;
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chip->offset_len = offset_len;
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ret = device_probe(dev);
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debug("%s: device_probe: ret=%d\n", __func__, ret);
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if (ret)
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goto err_probe;
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*devp = dev;
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return 0;
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err_probe:
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/*
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* If the device failed to probe, unbind it. There is nothing there
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* on the bus so we don't want to leave it lying around
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*/
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device_unbind(dev);
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err_bind:
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free(str);
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return ret;
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}
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int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
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struct udevice **devp)
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{
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struct udevice *dev;
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debug("%s: Searching bus '%s' for address %02x: ", __func__,
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bus->name, chip_addr);
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for (device_find_first_child(bus, &dev); dev;
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device_find_next_child(&dev)) {
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struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
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int ret;
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if (chip->chip_addr == chip_addr) {
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ret = device_probe(dev);
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debug("found, ret=%d\n", ret);
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if (ret)
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return ret;
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*devp = dev;
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return 0;
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}
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}
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debug("not found\n");
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return i2c_bind_driver(bus, chip_addr, offset_len, devp);
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}
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int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
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struct udevice **devp)
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{
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struct udevice *bus;
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int ret;
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ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus);
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if (ret) {
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debug("Cannot find I2C bus %d\n", busnum);
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return ret;
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}
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ret = i2c_get_chip(bus, chip_addr, offset_len, devp);
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if (ret) {
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debug("Cannot find I2C chip %02x on bus %d\n", chip_addr,
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busnum);
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return ret;
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}
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return 0;
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}
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int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
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struct udevice **devp)
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{
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int ret;
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*devp = NULL;
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/* First probe that chip */
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ret = i2c_probe_chip(bus, chip_addr, chip_flags);
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debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name,
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chip_addr, ret);
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if (ret)
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return ret;
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/* The chip was found, see if we have a driver, and probe it */
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ret = i2c_get_chip(bus, chip_addr, 1, devp);
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debug("%s: i2c_get_chip: ret=%d\n", __func__, ret);
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return ret;
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}
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int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
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{
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struct dm_i2c_ops *ops = i2c_get_ops(bus);
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struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus);
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int ret;
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/*
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* If we have a method, call it. If not then the driver probably wants
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* to deal with speed changes on the next transfer. It can easily read
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* the current speed from this uclass
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*/
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if (ops->set_bus_speed) {
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ret = ops->set_bus_speed(bus, speed);
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if (ret)
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return ret;
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}
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i2c->speed_hz = speed;
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return 0;
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}
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int dm_i2c_get_bus_speed(struct udevice *bus)
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{
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struct dm_i2c_ops *ops = i2c_get_ops(bus);
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struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus);
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if (!ops->get_bus_speed)
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return i2c->speed_hz;
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return ops->get_bus_speed(bus);
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}
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int i2c_set_chip_flags(struct udevice *dev, uint flags)
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{
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struct udevice *bus = dev->parent;
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struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
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struct dm_i2c_ops *ops = i2c_get_ops(bus);
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int ret;
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if (ops->set_flags) {
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ret = ops->set_flags(dev, flags);
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if (ret)
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return ret;
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}
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chip->flags = flags;
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return 0;
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}
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int i2c_get_chip_flags(struct udevice *dev, uint *flagsp)
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{
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struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
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*flagsp = chip->flags;
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return 0;
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}
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int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len)
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{
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struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
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if (offset_len > I2C_MAX_OFFSET_LEN)
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return -EINVAL;
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chip->offset_len = offset_len;
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return 0;
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}
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int i2c_get_chip_offset_len(struct udevice *dev)
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{
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struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
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return chip->offset_len;
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}
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int i2c_deblock(struct udevice *bus)
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{
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struct dm_i2c_ops *ops = i2c_get_ops(bus);
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/*
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* We could implement a software deblocking here if we could get
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* access to the GPIOs used by I2C, and switch them to GPIO mode
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* and then back to I2C. This is somewhat beyond our powers in
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* driver model at present, so for now just fail.
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*
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* See https://patchwork.ozlabs.org/patch/399040/
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*/
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if (!ops->deblock)
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return -ENOSYS;
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return ops->deblock(bus);
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}
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip)
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{
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int addr;
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chip->offset_len = dev_read_u32_default(dev, "u-boot,i2c-offset-len",
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1);
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chip->flags = 0;
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addr = dev_read_u32_default(dev, "reg", -1);
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if (addr == -1) {
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debug("%s: I2C Node '%s' has no 'reg' property %s\n", __func__,
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dev_read_name(dev), dev->name);
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return -EINVAL;
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}
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chip->chip_addr = addr;
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return 0;
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}
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#endif
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static int i2c_post_probe(struct udevice *dev)
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{
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
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i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency", 100000);
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return dm_i2c_set_bus_speed(dev, i2c->speed_hz);
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#else
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return 0;
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#endif
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}
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static int i2c_child_post_bind(struct udevice *dev)
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{
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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struct dm_i2c_chip *plat = dev_get_parent_platdata(dev);
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if (!dev_of_valid(dev))
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return 0;
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return i2c_chip_ofdata_to_platdata(dev, plat);
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#else
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return 0;
|
|
#endif
|
|
}
|
|
|
|
UCLASS_DRIVER(i2c) = {
|
|
.id = UCLASS_I2C,
|
|
.name = "i2c",
|
|
.flags = DM_UC_FLAG_SEQ_ALIAS,
|
|
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
|
.post_bind = dm_scan_fdt_dev,
|
|
#endif
|
|
.post_probe = i2c_post_probe,
|
|
.per_device_auto_alloc_size = sizeof(struct dm_i2c_bus),
|
|
.per_child_platdata_auto_alloc_size = sizeof(struct dm_i2c_chip),
|
|
.child_post_bind = i2c_child_post_bind,
|
|
};
|
|
|
|
UCLASS_DRIVER(i2c_generic) = {
|
|
.id = UCLASS_I2C_GENERIC,
|
|
.name = "i2c_generic",
|
|
};
|
|
|
|
U_BOOT_DRIVER(i2c_generic_chip_drv) = {
|
|
.name = "i2c_generic_chip_drv",
|
|
.id = UCLASS_I2C_GENERIC,
|
|
};
|