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- Add IXP4xx NPE ethernet MAC support - Add support for Intel IXDPG425 board - Add support for Prodrive PDNB3 board - Add IRQ support Patch by Stefan Roese, 23 May 2006 [This patch does not include cpu/ixp/npe/IxNpeMicrocode.c which still sufferes from licensing issues. Blame Intel.]
250 lines
5.5 KiB
C
250 lines
5.5 KiB
C
/*
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* (C) Copyright 2006
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <malloc.h>
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#include <asm/arch/ixp425.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* Prototypes */
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int gunzip(void *, int, unsigned char *, unsigned long *);
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int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
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/* predefine these here for FPGA programming (before including fpga.c) */
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#define SET_FPGA(data) *IXP425_GPIO_GPOUTR = (data)
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#define FPGA_DONE_STATE (*IXP425_GPIO_GPINR & CFG_FPGA_DONE)
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#define FPGA_INIT_STATE (*IXP425_GPIO_GPINR & CFG_FPGA_INIT)
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#define OLD_VAL old_val
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static unsigned long old_val = 0;
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/*
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* include common fpga code (for prodrive boards)
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*/
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#include "../common/fpga.c"
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/*
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* Miscelaneous platform dependent initialisations
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*/
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int board_post_init(void)
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{
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return (0);
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}
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int board_init(void)
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{
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/* arch number of PDNB3 */
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gd->bd->bi_arch_number = MACH_TYPE_PDNB3;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = 0x00000100;
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GPIO_OUTPUT_SET(CFG_GPIO_FPGA_RESET);
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GPIO_OUTPUT_ENABLE(CFG_GPIO_FPGA_RESET);
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GPIO_OUTPUT_SET(CFG_GPIO_SYS_RUNNING);
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GPIO_OUTPUT_ENABLE(CFG_GPIO_SYS_RUNNING);
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/*
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* Setup GPIO's for FPGA programming
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*/
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GPIO_OUTPUT_CLEAR(CFG_GPIO_PRG);
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GPIO_OUTPUT_CLEAR(CFG_GPIO_CLK);
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GPIO_OUTPUT_CLEAR(CFG_GPIO_DATA);
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GPIO_OUTPUT_ENABLE(CFG_GPIO_PRG);
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GPIO_OUTPUT_ENABLE(CFG_GPIO_CLK);
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GPIO_OUTPUT_ENABLE(CFG_GPIO_DATA);
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GPIO_OUTPUT_DISABLE(CFG_GPIO_INIT);
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GPIO_OUTPUT_DISABLE(CFG_GPIO_DONE);
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/*
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* Setup GPIO's for interrupts
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*/
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GPIO_OUTPUT_DISABLE(CFG_GPIO_PCI_INTA);
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GPIO_INT_ACT_LOW_SET(CFG_GPIO_PCI_INTA);
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GPIO_OUTPUT_DISABLE(CFG_GPIO_PCI_INTB);
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GPIO_INT_ACT_LOW_SET(CFG_GPIO_PCI_INTB);
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GPIO_OUTPUT_DISABLE(CFG_GPIO_RESTORE_INT);
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GPIO_INT_ACT_LOW_SET(CFG_GPIO_RESTORE_INT);
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GPIO_OUTPUT_DISABLE(CFG_GPIO_RESTART_INT);
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GPIO_INT_ACT_LOW_SET(CFG_GPIO_RESTART_INT);
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/*
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* Setup GPIO's for 33MHz clock output
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*/
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*IXP425_GPIO_GPCLKR = 0x01FF0000;
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GPIO_OUTPUT_ENABLE(CFG_GPIO_CLK_33M);
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/*
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* Setup other chip select's
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*/
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*IXP425_EXP_CS1 = CFG_EXP_CS1;
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return 0;
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}
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/*
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* Check Board Identity
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*/
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int checkboard(void)
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{
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char *s = getenv("serial#");
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puts("Board: PDNB3");
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if (s != NULL) {
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puts(", serial# ");
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puts(s);
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}
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putc('\n');
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return (0);
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}
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int dram_init(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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return (0);
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}
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int do_fpga_boot(unsigned char *fpgadata)
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{
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unsigned char *dst;
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int status;
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int index;
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int i;
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ulong len = CFG_MALLOC_LEN;
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/*
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* Setup GPIO's for FPGA programming
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*/
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GPIO_OUTPUT_CLEAR(CFG_GPIO_PRG);
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GPIO_OUTPUT_CLEAR(CFG_GPIO_CLK);
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GPIO_OUTPUT_CLEAR(CFG_GPIO_DATA);
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/*
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* Save value so no readback is required upon programming
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*/
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old_val = *IXP425_GPIO_GPOUTR;
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/*
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* First try to decompress fpga image (gzip compressed?)
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*/
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dst = malloc(CFG_FPGA_MAX_SIZE);
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if (gunzip(dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
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printf("Error: Image has to be gzipp'ed!\n");
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return -1;
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}
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status = fpga_boot(dst, len);
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if (status != 0) {
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printf("\nFPGA: Booting failed ");
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switch (status) {
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case ERROR_FPGA_PRG_INIT_LOW:
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printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
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break;
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case ERROR_FPGA_PRG_INIT_HIGH:
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printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
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break;
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case ERROR_FPGA_PRG_DONE:
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printf("(Timeout: DONE not high after programming FPGA)\n ");
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break;
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}
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/* display infos on fpgaimage */
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index = 15;
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for (i=0; i<4; i++) {
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len = dst[index];
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printf("FPGA: %s\n", &(dst[index+1]));
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index += len+3;
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}
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putc ('\n');
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/* delayed reboot */
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for (i=5; i>0; i--) {
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printf("Rebooting in %2d seconds \r",i);
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for (index=0;index<1000;index++)
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udelay(1000);
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}
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putc('\n');
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do_reset(NULL, 0, 0, NULL);
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}
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puts("FPGA: ");
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/* display infos on fpgaimage */
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index = 15;
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for (i=0; i<4; i++) {
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len = dst[index];
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printf("%s ", &(dst[index+1]));
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index += len+3;
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}
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putc('\n');
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free(dst);
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/*
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* Reset FPGA
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*/
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GPIO_OUTPUT_CLEAR(CFG_GPIO_FPGA_RESET);
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udelay(10);
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GPIO_OUTPUT_SET(CFG_GPIO_FPGA_RESET);
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return (0);
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}
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int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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ulong addr;
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if (argc < 2) {
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printf ("Usage:\n%s\n", cmdtp->usage);
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return 1;
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}
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addr = simple_strtoul(argv[1], NULL, 16);
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return do_fpga_boot((unsigned char *)addr);
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}
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U_BOOT_CMD(
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fpga, 2, 0, do_fpga,
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"fpga - boot FPGA\n",
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"address size\n - boot FPGA with gzipped image at <address>\n"
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);
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#if (CONFIG_COMMANDS & CFG_CMD_PCI) || defined(CONFIG_PCI)
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extern struct pci_controller hose;
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extern void pci_ixp_init(struct pci_controller * hose);
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void pci_init_board(void)
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{
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extern void pci_ixp_init (struct pci_controller *hose);
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pci_ixp_init(&hose);
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}
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#endif
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