mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 11:16:15 +09:00
fe9805fc7f
1947c2d2a0introduces cache line flushes for the bootcounter, but if the start address is not aligned then the flush causes warnings of the form: CACHE: Misaligned operation at range [4030b7fc, 4030b83c] Align both the start and end of the buffer (possibly crossing multiple lines). Fixes:1947c2d2a0("bootcount: flush after storing the bootcounter") Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
51 lines
1.3 KiB
C
51 lines
1.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2010-2012
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*/
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#include <bootcount.h>
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#include <linux/compiler.h>
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/* Now implement the generic default functions */
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__weak void bootcount_store(ulong a)
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{
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void *reg = (void *)CONFIG_SYS_BOOTCOUNT_ADDR;
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uintptr_t flush_start = rounddown(CONFIG_SYS_BOOTCOUNT_ADDR,
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CONFIG_SYS_CACHELINE_SIZE);
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uintptr_t flush_end;
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#if defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD)
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raw_bootcount_store(reg, (BOOTCOUNT_MAGIC & 0xffff0000) | a);
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flush_end = roundup(CONFIG_SYS_BOOTCOUNT_ADDR + 4,
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CONFIG_SYS_CACHELINE_SIZE);
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#else
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raw_bootcount_store(reg, a);
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raw_bootcount_store(reg + 4, BOOTCOUNT_MAGIC);
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flush_end = roundup(CONFIG_SYS_BOOTCOUNT_ADDR + 8,
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CONFIG_SYS_CACHELINE_SIZE);
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#endif /* defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD */
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flush_dcache_range(flush_start, flush_end);
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}
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__weak ulong bootcount_load(void)
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{
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void *reg = (void *)CONFIG_SYS_BOOTCOUNT_ADDR;
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#if defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD)
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u32 tmp = raw_bootcount_load(reg);
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if ((tmp & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000))
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return 0;
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else
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return (tmp & 0x0000ffff);
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#else
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if (raw_bootcount_load(reg + 4) != BOOTCOUNT_MAGIC)
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return 0;
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else
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return raw_bootcount_load(reg);
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#endif /* defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD) */
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}
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