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https://github.com/brain-hackers/u-boot-brain
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cb93071bb6
Prepare for emulator support for mpc85xx parts. Disable DDR training and skip wrlvl_cntl_2 and wrlvl_cntl_3 registers. These two registers improve stability but not supported by emulator. Add CONFIG_FSL_TBCLK_EXTRA_DIV for possible adjustment to time base. Signed-off-by: York Sun <yorksun@freescale.com> |
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.. | ||
common_timing_params.h | ||
ctrl_regs.c | ||
ddr1_dimm_params.c | ||
ddr2_dimm_params.c | ||
ddr3_dimm_params.c | ||
ddr.h | ||
interactive.c | ||
lc_common_dimm_params.c | ||
main.c | ||
Makefile | ||
options.c | ||
util.c |