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![Haavard Skinnemoen](/assets/img/avatar_default.png)
This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de>
193 lines
4.8 KiB
C
193 lines
4.8 KiB
C
/*
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* Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#include <common.h>
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#include <malloc.h>
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#include <spi.h>
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#include <asm/io.h>
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#ifdef CONFIG_MX27
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/* i.MX27 has a completely wrong register layout and register definitions in the
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* datasheet, the correct one is in the Freescale's Linux driver */
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#error "i.MX27 CSPI not supported due to drastic differences in register definisions" \
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"See linux mxc_spi driver from Freescale for details."
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#else
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#define MXC_CSPIRXDATA 0x00
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#define MXC_CSPITXDATA 0x04
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#define MXC_CSPICTRL 0x08
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#define MXC_CSPIINT 0x0C
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#define MXC_CSPIDMA 0x10
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#define MXC_CSPISTAT 0x14
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#define MXC_CSPIPERIOD 0x18
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#define MXC_CSPITEST 0x1C
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#define MXC_CSPIRESET 0x00
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#define MXC_CSPICTRL_EN (1 << 0)
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#define MXC_CSPICTRL_MODE (1 << 1)
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#define MXC_CSPICTRL_XCH (1 << 2)
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#define MXC_CSPICTRL_SMC (1 << 3)
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#define MXC_CSPICTRL_POL (1 << 4)
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#define MXC_CSPICTRL_PHA (1 << 5)
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#define MXC_CSPICTRL_SSCTL (1 << 6)
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#define MXC_CSPICTRL_SSPOL (1 << 7)
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#define MXC_CSPICTRL_CHIPSELECT(x) (((x) & 0x3) << 24)
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#define MXC_CSPICTRL_BITCOUNT(x) (((x) & 0x1f) << 8)
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#define MXC_CSPICTRL_DATARATE(x) (((x) & 0x7) << 16)
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#define MXC_CSPIPERIOD_32KHZ (1 << 15)
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static unsigned long spi_bases[] = {
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0x43fa4000,
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0x50010000,
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0x53f84000,
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};
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#endif
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struct mxc_spi_slave {
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struct spi_slave slave;
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unsigned long base;
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u32 ctrl_reg;
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};
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static inline struct mxc_spi_slave *to_mxc_spi_slave(struct spi_slave *slave)
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{
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return container_of(slave, struct mxc_spi_slave, slave);
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}
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static inline u32 reg_read(unsigned long addr)
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{
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return *(volatile unsigned long*)addr;
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}
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static inline void reg_write(unsigned long addr, u32 val)
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{
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*(volatile unsigned long*)addr = val;
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}
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static u32 spi_xchg_single(struct spi_slave *slave, u32 data, int bitlen)
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{
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struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
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unsigned int cfg_reg = reg_read(mxcs->base + MXC_CSPICTRL);
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if (MXC_CSPICTRL_BITCOUNT(bitlen - 1) != (cfg_reg & MXC_CSPICTRL_BITCOUNT(31))) {
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cfg_reg = (cfg_reg & ~MXC_CSPICTRL_BITCOUNT(31)) |
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MXC_CSPICTRL_BITCOUNT(bitlen - 1);
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reg_write(mxcs->base + MXC_CSPICTRL, cfg_reg);
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}
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reg_write(mxcs->base + MXC_CSPITXDATA, data);
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cfg_reg |= MXC_CSPICTRL_XCH;
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reg_write(mxcs->base + MXC_CSPICTRL, cfg_reg);
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while (reg_read(mxcs->base + MXC_CSPICTRL) & MXC_CSPICTRL_XCH)
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;
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return reg_read(mxcs->base + MXC_CSPIRXDATA);
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}
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int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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void *din, unsigned long flags)
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{
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int n_blks = (bitlen + 31) / 32;
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u32 *out_l, *in_l;
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int i;
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if ((int)dout & 3 || (int)din & 3) {
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printf("Error: unaligned buffers in: %p, out: %p\n", din, dout);
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return 1;
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}
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for (i = 0, in_l = (u32 *)din, out_l = (u32 *)dout;
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i < n_blks;
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i++, in_l++, out_l++, bitlen -= 32)
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*in_l = spi_xchg_single(slave, *out_l, bitlen);
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return 0;
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}
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void spi_init(void)
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{
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}
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struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int mode)
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{
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unsigned int ctrl_reg;
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struct mxc_spi_slave *mxcs;
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if (bus >= sizeof(spi_bases) / sizeof(spi_bases[0]) ||
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cs > 3)
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return NULL;
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ctrl_reg = MXC_CSPICTRL_CHIPSELECT(cs) |
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MXC_CSPICTRL_BITCOUNT(31) |
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MXC_CSPICTRL_DATARATE(7) | /* FIXME: calculate data rate */
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MXC_CSPICTRL_EN |
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MXC_CSPICTRL_MODE;
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if (mode & SPI_CPHA)
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ctrl_reg |= MXC_CSPICTRL_PHA;
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if (!(mode & SPI_CPOL))
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ctrl_reg |= MXC_CSPICTRL_POL;
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if (mode & SPI_CS_HIGH)
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ctrl_reg |= MXC_CSPICTRL_SSPOL;
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mxcs = malloc(sizeof(struct mxc_spi_slave));
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if (!mxcs)
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return NULL;
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mxcs->slave.bus = bus;
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mxcs->slave.cs = cs;
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mxcs->base = spi_bases[bus];
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mxcs->ctrl_reg = ctrl_reg;
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return &mxcs->slave;
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}
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void spi_free_slave(struct spi_slave *slave)
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{
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free(slave);
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}
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int spi_claim_bus(struct spi_slave *slave)
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{
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struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
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reg_write(mxcs->base + MXC_CSPIRESET, 1);
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udelay(1);
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reg_write(mxcs->base + MXC_CSPICTRL, mxcs->ctrl_reg);
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reg_write(mxcs->base + MXC_CSPIPERIOD,
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MXC_CSPIPERIOD_32KHZ);
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reg_write(mxcs->base + MXC_CSPIINT, 0);
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return 0;
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}
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void spi_release_bus(struct spi_slave *slave)
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{
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/* TODO: Shut the controller down */
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}
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