mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
2863724831
rk3036 mmc do not have internal dma, so we use fifo mode when read and write data, we get the fifo mode and fifo depth property from dts, pass to dw_mmc driver. Signed-off-by: Lin Huang <hl@rock-chips.com>
113 lines
2.6 KiB
C
113 lines
2.6 KiB
C
/*
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* Copyright (c) 2013 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <clk.h>
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#include <dm.h>
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#include <dwmmc.h>
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#include <errno.h>
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#include <syscon.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/periph.h>
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#include <linux/err.h>
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DECLARE_GLOBAL_DATA_PTR;
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struct rockchip_dwmmc_priv {
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struct udevice *clk;
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struct rk3288_grf *grf;
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struct dwmci_host host;
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};
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static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
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{
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struct udevice *dev = host->priv;
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struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
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int ret;
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ret = clk_set_periph_rate(priv->clk, PERIPH_ID_SDMMC0 + host->dev_index,
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freq);
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if (ret < 0) {
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debug("%s: err=%d\n", __func__, ret);
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return ret;
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}
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return freq;
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}
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static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)
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{
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struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
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struct dwmci_host *host = &priv->host;
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host->name = dev->name;
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host->ioaddr = (void *)dev_get_addr(dev);
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host->buswidth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
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"bus-width", 4);
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host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
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host->priv = dev;
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/* use non-removeable as sdcard and emmc as judgement */
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if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "non-removable"))
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host->dev_index = 1;
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return 0;
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}
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static int rockchip_dwmmc_probe(struct udevice *dev)
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{
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struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
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struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
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struct dwmci_host *host = &priv->host;
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u32 minmax[2];
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int ret;
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int fifo_depth;
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priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
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if (IS_ERR(priv->grf))
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return PTR_ERR(priv->grf);
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ret = uclass_get_device(UCLASS_CLK, CLK_GENERAL, &priv->clk);
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if (ret)
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return ret;
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if (fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
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"clock-freq-min-max", minmax, 2))
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return -EINVAL;
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fifo_depth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
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"fifo-depth", 0);
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if (fifo_depth < 0)
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return -EINVAL;
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host->fifoth_val = MSIZE(0x2) |
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RX_WMARK(fifo_depth / 2 - 1) | TX_WMARK(fifo_depth / 2);
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if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "fifo-mode"))
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host->fifo_mode = true;
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ret = add_dwmci(host, minmax[1], minmax[0]);
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if (ret)
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return ret;
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upriv->mmc = host->mmc;
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return 0;
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}
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static const struct udevice_id rockchip_dwmmc_ids[] = {
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{ .compatible = "rockchip,rk3288-dw-mshc" },
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{ }
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};
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U_BOOT_DRIVER(rockchip_dwmmc_drv) = {
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.name = "rockchip_dwmmc",
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.id = UCLASS_MMC,
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.of_match = rockchip_dwmmc_ids,
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.ofdata_to_platdata = rockchip_dwmmc_ofdata_to_platdata,
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.probe = rockchip_dwmmc_probe,
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.priv_auto_alloc_size = sizeof(struct rockchip_dwmmc_priv),
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};
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