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https://github.com/brain-hackers/u-boot-brain
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25ddd1fb0a
CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not being able to use "sizeof(struct global_data)" in assembler files. Recent experience has shown that manual synchronization is not reliable enough. This patch renames CONFIG_SYS_GBL_DATA_SIZE into GENERATED_GBL_DATA_SIZE which gets automatically generated by the asm-offsets tool. In the result, all definitions of this value can be deleted from the board config files. We have to make sure that all files that reference such data include the new <asm-offsets.h> file. No other changes have been done yet, but it is obvious that similar changes / simplifications can be done for other, related macro definitions as well. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Kumar Gala <galak@kernel.crashing.org>
235 lines
6.9 KiB
C
235 lines
6.9 KiB
C
/*
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* (C) Copyright 2005
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
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#define CONFIG_MPC5200 1 /* More exactly a MPC5200 */
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#define CONFIG_CANMB 1 /* ... on canmb board - we need this for FEC.C */
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/*
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* allowed and functional CONFIG_SYS_TEXT_BASE values:
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* 0xfe000000 low boot at 0x00000100 (default board setting)
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* 0x00100000 RAM load and test
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*/
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#define CONFIG_SYS_TEXT_BASE 0xFE000000
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#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
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#define CONFIG_BOARD_EARLY_INIT_R
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#define CONFIG_HIGH_BATS 1 /* High BATs supported */
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/*
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* Serial console configuration
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*/
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#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
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#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_DATE
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_IMMAP
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_NFS
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#define CONFIG_CMD_REGINFO
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#define CONFIG_CMD_SNTP
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/*
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* MUST be low boot - HIGHBOOT is not supported anymore
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*/
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#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */
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# define CONFIG_SYS_LOWBOOT 1
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# define CONFIG_SYS_LOWBOOT16 1
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#else
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# error "CONFIG_SYS_TEXT_BASE must be 0xFE000000"
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#endif
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/*
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* Autobooting
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*/
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#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
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#define CONFIG_PREBOOT "echo;" \
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"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
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"echo"
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#undef CONFIG_BOOTARGS
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth0\0" \
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"nfsargs=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${serverip}:${rootpath}\0" \
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"ramargs=setenv bootargs root=/dev/ram rw\0" \
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"addip=setenv bootargs ${bootargs} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
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":${hostname}:${netdev}:off panic=1\0" \
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"flash_nfs=run nfsargs addip;" \
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"bootm ${kernel_addr}\0" \
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"flash_self=run ramargs addip;" \
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"bootm ${kernel_addr} ${ramdisk_addr}\0" \
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"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
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"rootpath=/opt/eldk/ppc_6xx\0" \
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"bootfile=/tftpboot/canmb/uImage\0" \
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""
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#define CONFIG_BOOTCOMMAND "run flash_self"
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/*
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* IPB Bus clocking configuration.
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*/
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#undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
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/*
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* Flash configuration, expect one 16 Megabyte Bank at most
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*/
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#define CONFIG_SYS_FLASH_BASE 0xFE000000
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#define CONFIG_SYS_FLASH_SIZE 0x02000000
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
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#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
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#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
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#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_SYS_FLASH_EMPTY_INFO
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/*
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* Environment settings
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*/
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#define CONFIG_ENV_IS_IN_FLASH 1
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#define CONFIG_ENV_OFFSET (2*128*1024)
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#define CONFIG_ENV_SIZE 0x2000
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#define CONFIG_ENV_SECT_SIZE (128*1024)
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/*
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* Memory map
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*
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* Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000
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*/
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#define CONFIG_SYS_MBAR 0xf0000000 /* DO NOT CHANGE this */
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#define CONFIG_SYS_SDRAM_BASE 0x00000000
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#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
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/* Use SRAM until RAM will be available */
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#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
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#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
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# define CONFIG_SYS_RAMBOOT 1
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#endif
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#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
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#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
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#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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/*
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* Ethernet configuration
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*/
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#define CONFIG_MPC5xxx_FEC 1
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#define CONFIG_MPC5xxx_FEC_MII100
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#define CONFIG_PHY_ADDR 0x0
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/*
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* GPIO configuration:
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* PSC1,2,3 predefined as UART
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* PCI disabled
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* Ethernet 100 with MD
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*/
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#define CONFIG_SYS_GPS_PORT_CONFIG 0x00058444
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
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#if defined(CONFIG_CMD_KGDB)
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# define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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#else
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# define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#endif
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x01f00000 /* 1 ... 31 MB in DRAM */
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#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
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#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
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#define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
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#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
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#if defined(CONFIG_CMD_KGDB)
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# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
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#endif
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/*
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* Various low-level settings
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*/
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#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
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#define CONFIG_SYS_HID0_FINAL HID0_ICE
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#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
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#define CONFIG_SYS_BOOTCS_CFG 0x00047D01
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#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
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#define CONFIG_SYS_CS_BURST 0x00000000
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#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
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#define CONFIG_SYS_RESET_ADDRESS 0x7f000000
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#endif /* __CONFIG_H */
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