mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-20 08:58:52 +09:00
![Simon Glass](/assets/img/avatar_default.png)
When not relying on Coreboot for GPIO init the GPIOs must be set up correctly. This is currently done statically through a rather ugly method. As the GPIOs are figured out they can be moved to the device tree and set up as needed rather than all at the start. In this implementation, board files should call ich_gpio_set_gpio_map() before the GPIO driver is used in order to provide the GPIO information. We use the early PCI interface so that this driver can now be used before relocation. Signed-off-by: Simon Glass <sjg@chromium.org>
66 lines
1.5 KiB
C
66 lines
1.5 KiB
C
/*
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* (C) Copyright 2002-2010
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_GBL_DATA_H
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#define __ASM_GBL_DATA_H
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#ifndef __ASSEMBLY__
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enum pei_boot_mode_t {
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PEI_BOOT_NONE = 0,
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PEI_BOOT_SOFT_RESET,
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PEI_BOOT_RESUME,
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};
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/* Architecture-specific global data */
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struct arch_global_data {
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struct global_data *gd_addr; /* Location of Global Data */
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uint8_t x86; /* CPU family */
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uint8_t x86_vendor; /* CPU vendor */
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uint8_t x86_model;
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uint8_t x86_mask;
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uint32_t x86_device;
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uint64_t tsc_base; /* Initial value returned by rdtsc() */
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uint32_t tsc_base_kclocks; /* Initial tsc as a kclocks value */
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uint32_t tsc_prev; /* For show_boot_progress() */
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uint32_t tsc_mhz; /* TSC frequency in MHz */
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void *new_fdt; /* Relocated FDT */
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uint32_t bist; /* Built-in self test value */
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struct pci_controller *hose; /* PCI hose for early use */
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enum pei_boot_mode_t pei_boot_mode;
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const struct pch_gpio_map *gpio_map; /* board GPIO map */
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};
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#endif
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#include <asm-generic/global_data.h>
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#ifndef __ASSEMBLY__
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static inline __attribute__((no_instrument_function)) gd_t *get_fs_gd_ptr(void)
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{
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gd_t *gd_ptr;
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asm volatile("fs movl 0, %0\n" : "=r" (gd_ptr));
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return gd_ptr;
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}
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#define gd get_fs_gd_ptr()
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#endif
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/*
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* Our private Global Data Flags
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*/
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#define GD_FLG_COLD_BOOT 0x00100 /* Cold Boot */
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#define GD_FLG_WARM_BOOT 0x00200 /* Warm Boot */
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#define DECLARE_GLOBAL_DATA_PTR
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#endif /* __ASM_GBL_DATA_H */
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