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1b42ab3eda
This patch adds support to update the device-tree blob to adjust the
DSP and IVA DPLL clocks pertinent to the selected OPP choice, with
the default being OPP_NOM. The voltage settings are done in u-boot,
but the actual clock configuration itself is done in kernel because
of the following reasons:
1. SoC definition constraints us to NOT to do dynamic voltage
scaling ever after the initial avs0 setting in bootloader
- so the voltage must be set in bootloader.
2. The voltage level must be set even if the IP blocks like
GPU/DSP are unused.
3. The IVA, GPU and DSP DPLLs are not essential for u-boot functionality,
and similar DPLL clock configuration code has been cleaned up in
v2014.10 u-boot release. See commit,
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|---|---|---|
| .. | ||
| abb.c | ||
| boot.c | ||
| dra7xx_iodelay.c | ||
| emif.c | ||
| fdt.c | ||
| hw_data.c | ||
| hwinit.c | ||
| Kconfig | ||
| Makefile | ||
| prcm-regs.c | ||
| sdram.c | ||
| sec_entry_cpu1.S | ||
| sec-fxns.c | ||