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https://github.com/brain-hackers/u-boot-brain
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6571d87315
Set up MSRs required for Apollo Lake. This enables Linux to use the timers correctly. Also write the fixed MSRs for this platform. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
35 lines
928 B
C
35 lines
928 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2019 Google LLC
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*/
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#ifndef _ASM_ARCH_CPU_H
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#define _ASM_ARCH_CPU_H
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/* Common Timer Copy (CTC) frequency - 19.2MHz */
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#define CTC_FREQ 19200000
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#define MAX_PCIE_PORTS 6
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#define CLKREQ_DISABLED 0xf
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#ifndef __ASSEMBLY__
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/* Flush L1D to L2 */
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void cpu_flush_l1d_to_l2(void);
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/**
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* Enable emulation of the PM timer
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*
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* Some legacy OSes cannot tolerate the ACPI timer stoping during idle states,
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* and this results in higher power consumption. ACPI timer emulation allows
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* disabling of the ACPI Timer (PM1_TMR) to have no impact on the system, with
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* the exception that TMR_STS will not be set on an overflow condition. All
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* aligned 32-bit reads from the ACPI Timer port are valid and will behave as if
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* the ACPI timer remains enabled.
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*
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* @pmc: PMC device
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*/
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void enable_pm_timer_emulation(const struct udevice *pmc);
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#endif
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#endif /* _ASM_ARCH_CPU_H */
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