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https://github.com/brain-hackers/u-boot-brain
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1a4596601f
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
49 lines
1.1 KiB
C
49 lines
1.1 KiB
C
/*
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* (C) Copyright 2010 Samsung Electronics
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* Minkyu Kang <mk7.kang@samsung.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ARM_ARCH_CLK_H_
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#define __ASM_ARM_ARCH_CLK_H_
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#define APLL 0
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#define MPLL 1
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#define EPLL 2
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#define HPLL 3
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#define VPLL 4
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#define BPLL 5
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enum pll_src_bit {
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EXYNOS_SRC_MPLL = 6,
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EXYNOS_SRC_EPLL,
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EXYNOS_SRC_VPLL,
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};
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unsigned long get_pll_clk(int pllreg);
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unsigned long get_arm_clk(void);
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unsigned long get_i2c_clk(void);
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unsigned long get_pwm_clk(void);
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unsigned long get_uart_clk(int dev_index);
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unsigned long get_mmc_clk(int dev_index);
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void set_mmc_clk(int dev_index, unsigned int div);
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unsigned long get_lcd_clk(void);
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void set_lcd_clk(void);
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void set_mipi_clk(void);
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void set_i2s_clk_source(void);
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int set_i2s_clk_prescaler(unsigned int src_frq, unsigned int dst_frq);
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int set_epll_clk(unsigned long rate);
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int set_spi_clk(int periph_id, unsigned int rate);
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/**
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* get the clk frequency of the required peripheral
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*
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* @param peripheral Peripheral id
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*
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* @return frequency of the peripheral clk
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*/
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unsigned long clock_get_periph_rate(int peripheral);
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#endif
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