mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-06 04:43:21 +09:00
![Chris Zankel](/assets/img/avatar_default.png)
The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Tensilica, inc. This is the second part of the basic architecture port, adding the 'arch/xtensa' directory and a readme file. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
13 lines
202 B
C
13 lines
202 B
C
/*
|
|
* Copyright (c) 2012 The Chromium OS Authors.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#ifndef __ASM_XTENSA_SECTIONS_H
|
|
#define __ASM_XTENSA_SECTIONS_H
|
|
|
|
#include <asm-generic/sections.h>
|
|
|
|
#endif
|