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https://github.com/brain-hackers/u-boot-brain
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fcb1964a5e
The pinctrl will default init the io while driver is probe with new pinctrl driver. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
54 lines
1.0 KiB
C
54 lines
1.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2015 Google, Inc
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*/
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#include <common.h>
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#include <clk.h>
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#include <dm.h>
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#include <ram.h>
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#include <syscon.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch-rockchip/clock.h>
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#include <asm/arch-rockchip/grf_rk3188.h>
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#include <asm/arch-rockchip/periph.h>
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#include <asm/arch-rockchip/pmu_rk3288.h>
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#include <asm/arch-rockchip/boot_mode.h>
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__weak int rk_board_late_init(void)
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{
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return 0;
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}
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int board_late_init(void)
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{
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struct rk3188_grf *grf;
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setup_boot_mode();
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grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
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if (IS_ERR(grf)) {
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pr_err("grf syscon returned %ld\n", PTR_ERR(grf));
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} else {
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/* enable noc remap to mimic legacy loaders */
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rk_clrsetreg(&grf->soc_con0,
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NOC_REMAP_MASK << NOC_REMAP_SHIFT,
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NOC_REMAP_MASK << NOC_REMAP_SHIFT);
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}
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return rk_board_late_init();
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}
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int board_init(void)
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{
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return 0;
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}
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#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
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void enable_caches(void)
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{
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/* Enable D-cache. I-cache is already enabled in start.S */
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dcache_enable();
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}
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#endif
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