Simon South 18c24c1177 ram: rk3328: Use correct frequency units in function ... Fix a pair of tests in phy_dll_bypass_set() that used incorrect units for the DDR frequency, causing the DRAM controller to be misconfigured in most cases. Signed-off-by: Simon South <simon@simonsouth.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>		2019-11-10 20:40:20 +08:00
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dmc-rk3368.c	rockchip: dmc: rk3368: update rank number for evb-px5	2019-05-08 17:34:12 +08:00
Kconfig	ram: rockchip: Kconfig: Add RK3399 LPDDR4 entry	2019-07-20 23:59:44 +08:00
Makefile	ram: rockchip: Add debug sdram driver	2019-07-19 11:11:09 +08:00
sdram_debug.c	ram: rk3399: debug: Add sdram_print_stride	2019-07-19 11:11:10 +08:00
sdram_rk322x.c	rockchip: rk322x: sdram: use udelay instead of rockchip_udelay	2019-07-20 23:59:44 +08:00
sdram_rk3128.c	rockchip: use 'arch-rockchip' as header file path	2019-05-01 00:00:05 +02:00
sdram_rk3188.c	rockchip: use 'arch-rockchip' as header file path	2019-05-01 00:00:05 +02:00
sdram_rk3288.c	ram: rk3288: Initialize dram for TPL builds	2019-09-19 09:35:31 +08:00
sdram_rk3328.c	ram: rk3328: Use correct frequency units in function	2019-11-10 20:40:20 +08:00
sdram_rk3399.c	ram: rk3399: update cap and ddrconfig for each channel after init	2019-08-23 15:27:40 +08:00
sdram-rk3399-lpddr4-400.inc	ram: rk3399: Add LPPDDR4-400 timings inc	2019-07-21 00:00:27 +08:00
sdram-rk3399-lpddr4-800.inc	ram: rk3399: Add LPPDDR4-800 timings inc	2019-07-21 00:00:30 +08:00