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![Anton staaf](/assets/img/avatar_default.png)
This macro is used to allocate cache line size aligned stack buffers for use with DMA hardware. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Aneesh V <aneesh@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <wd@denx.de>
54 lines
2.2 KiB
Plaintext
54 lines
2.2 KiB
Plaintext
Disabling I-cache:
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- Set CONFIG_SYS_ICACHE_OFF
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Disabling D-cache:
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- Set CONFIG_SYS_DCACHE_OFF
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Enabling I-cache:
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- Make sure CONFIG_SYS_ICACHE_OFF is not set and call icache_enable().
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Enabling D-cache:
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- Make sure CONFIG_SYS_DCACHE_OFF is not set and call dcache_enable().
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Enabling Caches at System Startup:
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- Implement enable_caches() for your platform and enable the I-cache and
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D-cache from this function. This function is called immediately
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after relocation.
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Guidelines for Working with D-cache:
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Memory to Peripheral DMA:
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- Flush the buffer after the MPU writes the data and before the DMA is
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initiated.
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Peripheral to Memory DMA:
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- Invalidate the buffer before starting the DMA. In case there are any dirty
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lines from the DMA buffer in the cache, subsequent cache-line replacements
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may corrupt the buffer in memory while the DMA is still going on. Cache-line
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replacement can happen if the CPU tries to bring some other memory locations
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into the cache while the DMA is going on.
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- Invalidate the buffer after the DMA is complete and before the MPU reads
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it. This may be needed in addition to the invalidation before the DMA
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mentioned above, because in some processors memory contents can spontaneously
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come to the cache due to speculative memory access by the CPU. If this
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happens with the DMA buffer while DMA is going on we have a coherency problem.
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Buffer Requirements:
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- Any buffer that is invalidated(that is, typically the peripheral to
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memory DMA buffer) should be aligned to cache-line boundary both at
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at the beginning and at the end of the buffer.
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- If the buffer is not cache-line aligned invalidation will be restricted
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to the aligned part. That is, one cache-line at the respective boundary
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may be left out while doing invalidation.
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- A suitable buffer can be alloced on the stack using the
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ALLOC_CACHE_ALIGN_BUFFER macro.
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Cleanup Before Linux:
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- cleanup_before_linux() should flush the D-cache, invalidate I-cache, and
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disable MMU and caches.
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- The following sequence is advisable while disabling d-cache:
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1. disable_dcache() - flushes and disables d-cache
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2. invalidate_dcache_all() - invalid any entry that came to the cache
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in the short period after the cache was flushed but before the
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cache got disabled.
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