u-boot-brain/arch/arm/mach-aspeed/ast2500-board.c
Tom Rini 83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00

83 lines
1.6 KiB
C

// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2016 Google, Inc
*/
#include <common.h>
#include <dm.h>
#include <ram.h>
#include <timer.h>
#include <asm/io.h>
#include <asm/arch/timer.h>
#include <asm/arch/wdt.h>
#include <linux/err.h>
#include <dm/uclass.h>
/*
* Second Watchdog Timer by default is configured
* to trigger secondary boot source.
*/
#define AST_2ND_BOOT_WDT 1
/*
* Third Watchdog Timer by default is configured
* to toggle Flash address mode switch before reset.
*/
#define AST_FLASH_ADDR_DETECT_WDT 2
DECLARE_GLOBAL_DATA_PTR;
void lowlevel_init(void)
{
/*
* These two watchdogs need to be stopped as soon as possible,
* otherwise the board might hang. By default they are set to
* a very short timeout and even simple debug write to serial
* console early in the init process might cause them to fire.
*/
struct ast_wdt *flash_addr_wdt =
(struct ast_wdt *)(WDT_BASE +
sizeof(struct ast_wdt) *
AST_FLASH_ADDR_DETECT_WDT);
clrbits_le32(&flash_addr_wdt->ctrl, WDT_CTRL_EN);
#ifndef CONFIG_FIRMWARE_2ND_BOOT
struct ast_wdt *sec_boot_wdt =
(struct ast_wdt *)(WDT_BASE +
sizeof(struct ast_wdt) *
AST_2ND_BOOT_WDT);
clrbits_le32(&sec_boot_wdt->ctrl, WDT_CTRL_EN);
#endif
}
int board_init(void)
{
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
return 0;
}
int dram_init(void)
{
struct udevice *dev;
struct ram_info ram;
int ret;
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret) {
debug("DRAM FAIL1\r\n");
return ret;
}
ret = ram_get_info(dev, &ram);
if (ret) {
debug("DRAM FAIL2\r\n");
return ret;
}
gd->ram_size = ram.size;
return 0;
}