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https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
32fd6169a1
The "hnp-srp-disable" property for dwc2 is specific to U-boot, not part of upstream Linux's device tree bindings. Move it to rk3328-u-boot.dtsi to avoid losing it when syncing device tree files. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
69 lines
1.2 KiB
Plaintext
69 lines
1.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2019 Rockchip Electronics Co., Ltd
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*/
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/ {
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aliases {
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mmc0 = &emmc;
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mmc1 = &sdmmc;
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};
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chosen {
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u-boot,spl-boot-order = &emmc, &sdmmc;
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};
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dmc: dmc {
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u-boot,dm-pre-reloc;
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compatible = "rockchip,rk3328-dmc";
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reg = <0x0 0xff400000 0x0 0x1000
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0x0 0xff780000 0x0 0x3000
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0x0 0xff100000 0x0 0x1000
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0x0 0xff440000 0x0 0x1000
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0x0 0xff720000 0x0 0x1000
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0x0 0xff798000 0x0 0x1000>;
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};
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usb_host0_xhci: usb@ff600000 {
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compatible = "rockchip,rk3328-xhci";
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reg = <0x0 0xff600000 0x0 0x100000>;
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interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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snps,dis-enblslpm-quirk;
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snps,phyif-utmi-bits = <16>;
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snps,dis-u2-freeclk-exists-quirk;
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snps,dis-u2-susphy-quirk;
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status = "disabled";
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};
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};
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&cru {
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u-boot,dm-pre-reloc;
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};
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&grf {
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u-boot,dm-pre-reloc;
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};
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&uart2 {
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u-boot,dm-pre-reloc;
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clock-frequency = <24000000>;
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};
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&emmc {
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u-boot,dm-pre-reloc;
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/* mmc to sram can't do dma, prevent aborts transfering TF-A parts */
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u-boot,spl-fifo-mode;
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};
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&sdmmc {
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u-boot,dm-pre-reloc;
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/* mmc to sram can't do dma, prevent aborts transfering TF-A parts */
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u-boot,spl-fifo-mode;
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};
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&usb20_otg {
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hnp-srp-disable;
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};
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