u-boot-brain/arch/arm/dts/imx8mm-evk-u-boot.dtsi
Marek Vasut 77cfd0d2b6 ARM: imx8m: Fix reset in SPL on NXP iMX8MM EVK
Board files should not re-implement do_reset() to work around this
function not being defined in for specific configurations. Rather,
the fix is to compile in drivers which implement this properly.
This patch enables sysreset and watchdog drivers in SPL and ties
them together to implement the same as the do_reset() hack in the
board file, except correctly in the DM/DT framework.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Flavio Suligoi <f.suligoi@asem.it>
Cc: Harald Seiler <hws@denx.de>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-05-01 13:46:22 +02:00

132 lines
1.3 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2019 NXP
*/
/ {
wdt-reboot {
compatible = "wdt-reboot";
wdt = <&wdog1>;
u-boot,dm-spl;
};
};
&{/soc@0} {
u-boot,dm-pre-reloc;
u-boot,dm-spl;
};
&clk {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ assigned-clock-rates;
};
&osc_24m {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&aips1 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&aips2 {
u-boot,dm-spl;
};
&aips3 {
u-boot,dm-spl;
};
&iomuxc {
u-boot,dm-spl;
};
&pinctrl_reg_usdhc2_vmmc {
u-boot,dm-spl;
};
&pinctrl_uart2 {
u-boot,dm-spl;
};
&pinctrl_usdhc2_gpio {
u-boot,dm-spl;
};
&pinctrl_usdhc2 {
u-boot,dm-spl;
};
&pinctrl_usdhc3 {
u-boot,dm-spl;
};
&gpio1 {
u-boot,dm-spl;
};
&gpio2 {
u-boot,dm-spl;
};
&gpio3 {
u-boot,dm-spl;
};
&gpio4 {
u-boot,dm-spl;
};
&gpio5 {
u-boot,dm-spl;
};
&uart2 {
u-boot,dm-spl;
};
&usdhc1 {
u-boot,dm-spl;
};
&usdhc2 {
u-boot,dm-spl;
};
&usdhc3 {
u-boot,dm-spl;
};
&i2c1 {
u-boot,dm-spl;
};
&{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} {
u-boot,dm-spl;
};
&{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} {
u-boot,dm-spl;
};
&pinctrl_i2c1 {
u-boot,dm-spl;
};
&pinctrl_pmic {
u-boot,dm-spl;
};
&fec1 {
phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
};
&wdog1 {
u-boot,dm-spl;
};