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https://github.com/brain-hackers/u-boot-brain
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67decc71ed
The OneNAND SPL used on PXA is slightly obscure. Due to the OneNAND limitation, where we have only the first 1KiB of the OneNAND available upon power-up as a memory-mapped area, from which the CPU starts executing, we place only the most essential code into this first 1KiB . This code copies the rest of the SPL into SRAM and jumps to it. This code is stored in section .text.0 . The rest of the SPL is stored in section .text.1 . When running the OBJCOPY on the SPL, it will preserve only .text section, but the .text.0 and .text.1 are stripped away from the result, thus making the SPL binary empty. The patch adds additional -j parameters to the OBJCOPY for PXA during the SPL build, which will preserve the .text.0 and .text.1 sections. Moreover, this patch also adds missing functions into the .text.0 section, since otherwise the PXA270 with 1KiB-window OneNAND won't be able to boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com>
76 lines
1.3 KiB
Plaintext
76 lines
1.3 KiB
Plaintext
/*
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* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
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* on behalf of DENX Software Engineering GmbH
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*
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* January 2004 - Changed to support H4 device
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* Copyright (c) 2004-2008 Texas Instruments
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*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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ENTRY(_start)
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SECTIONS
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{
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. = CONFIG_SPL_TEXT_BASE;
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.text.0 :
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{
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arch/arm/cpu/pxa/start.o (.text*)
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arch/arm/lib/built-in.o (.text*)
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board/vpac270/built-in.o (.text*)
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drivers/mtd/onenand/built-in.o (.text*)
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}
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/* Start of the rest of the SPL */
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. = CONFIG_SPL_TEXT_BASE + 0x800;
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.text.1 :
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{
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*(.text*)
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}
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. = ALIGN(4);
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.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
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. = ALIGN(4);
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.data : {
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*(.data*)
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}
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. = ALIGN(4);
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__image_copy_end = .;
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.rel.dyn : {
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__rel_dyn_start = .;
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*(.rel*)
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__rel_dyn_end = .;
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}
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. = ALIGN(0x800);
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_end = .;
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.bss __rel_dyn_start (OVERLAY) : {
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__bss_start = .;
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*(.bss*)
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. = ALIGN(4);
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__bss_end = .;
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}
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.dynsym _end : { *(.dynsym) }
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.dynbss : { *(.dynbss) }
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.dynstr : { *(.dynstr*) }
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.dynamic : { *(.dynamic*) }
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.hash : { *(.hash*) }
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.plt : { *(.plt*) }
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.interp : { *(.interp*) }
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.gnu : { *(.gnu*) }
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.ARM.exidx : { *(.ARM.exidx*) }
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}
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