mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
3e38691e8f
Add IDMA example code (tested on 8260 only) * Add support for Purple Board (MIPS64 5Kc) * Add support for MIPS64 5Kc CPUs * Fix missing setting of "loadaddr" and "bootfile" on ARM and MIPS * Patch by Denis Peter, 04 Apr 2003: - update MIP405-4 board * Patches by Denis Peter, 03 April 2003: - fix PCI IRQs on MPL boards - fix two more un-relocated pointer problems * Fix behaviour of "run" command: - print error message iv variable does not exist - terminate processing of arguments in case of error * Patches by Peter Figuli, 10 Mar 2003 - Add support for BTUART on PXA platform - Add support for WEP EP250 (PXA) board * Fix flash problems on INCA-IP; add tool to allow bruning images to flash using a BDI2000 * Implement fix for I2C Edge Conditions problem for all boards that use the bit-banging driver (common/soft_i2c.c) * Add patches by Robert Schwebel, 31 Mar 2003: - csb226 board: bring in sync with innokom/memsetup.S - csb226 board: fix MDREFR handling - misc doc fixes / extensions - innokom board: cleanup, MDREFR fix in memsetup.S, config update - add BOOT_PROGRESS to armlinux.c
84 lines
2.6 KiB
ArmAsm
84 lines
2.6 KiB
ArmAsm
/* setjmp for PowerPC.
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Copyright (C) 1995, 1996, 1997, 1999, 2000 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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#include <ppc_asm.tmpl>
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# define JB_GPR1 0 /* Also known as the stack pointer */
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# define JB_GPR2 1
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# define JB_LR 2 /* The address we will return to */
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# define JB_GPRS 3 /* GPRs 14 through 31 are saved, 18 in total */
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# define JB_CR 21 /* Condition code registers. */
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# define JB_FPRS 22 /* FPRs 14 through 31 are saved, 18*2 words total */
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# define JB_SIZE (58*4)
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#define FP(x...) x
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.globl setctxsp;
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setctxsp:
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mr r1, r3
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blr
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.globl ppc_setjmp;
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ppc_setjmp:
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stw r1,(JB_GPR1*4)(3)
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mflr r0
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stw r2,(JB_GPR2*4)(3)
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stw r14,((JB_GPRS+0)*4)(3)
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FP( stfd 14,((JB_FPRS+0*2)*4)(3))
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stw r0,(JB_LR*4)(3)
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stw r15,((JB_GPRS+1)*4)(3)
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FP( stfd 15,((JB_FPRS+1*2)*4)(3))
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mfcr r0
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stw r16,((JB_GPRS+2)*4)(3)
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FP( stfd 16,((JB_FPRS+2*2)*4)(3))
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stw r0,(JB_CR*4)(3)
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stw r17,((JB_GPRS+3)*4)(3)
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FP( stfd 17,((JB_FPRS+3*2)*4)(3))
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stw r18,((JB_GPRS+4)*4)(3)
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FP( stfd 18,((JB_FPRS+4*2)*4)(3))
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stw r19,((JB_GPRS+5)*4)(3)
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FP( stfd 19,((JB_FPRS+5*2)*4)(3))
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stw r20,((JB_GPRS+6)*4)(3)
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FP( stfd 20,((JB_FPRS+6*2)*4)(3))
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stw r21,((JB_GPRS+7)*4)(3)
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FP( stfd 21,((JB_FPRS+7*2)*4)(3))
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stw r22,((JB_GPRS+8)*4)(3)
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FP( stfd 22,((JB_FPRS+8*2)*4)(3))
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stw r23,((JB_GPRS+9)*4)(3)
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FP( stfd 23,((JB_FPRS+9*2)*4)(3))
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stw r24,((JB_GPRS+10)*4)(3)
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FP( stfd 24,((JB_FPRS+10*2)*4)(3))
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stw r25,((JB_GPRS+11)*4)(3)
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FP( stfd 25,((JB_FPRS+11*2)*4)(3))
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stw r26,((JB_GPRS+12)*4)(3)
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FP( stfd 26,((JB_FPRS+12*2)*4)(3))
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stw r27,((JB_GPRS+13)*4)(3)
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FP( stfd 27,((JB_FPRS+13*2)*4)(3))
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stw r28,((JB_GPRS+14)*4)(3)
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FP( stfd 28,((JB_FPRS+14*2)*4)(3))
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stw r29,((JB_GPRS+15)*4)(3)
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FP( stfd 29,((JB_FPRS+15*2)*4)(3))
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stw r30,((JB_GPRS+16)*4)(3)
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FP( stfd 30,((JB_FPRS+16*2)*4)(3))
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stw r31,((JB_GPRS+17)*4)(3)
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FP( stfd 31,((JB_FPRS+17*2)*4)(3))
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li 3, 0
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blr
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