Stephen Warren dfa551e49c ARM: tegra210: implement PLLE init procedure from TRM ... Implement the procedure that the TRM mandates to initialize PLLREFE and PLLE. This makes the PLL actually lock. Note that this section of the TRM is being cleaned up to remove some confusion. The set of register accesses in this patch should be final, although the step numbers/descriptions might still change. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>		2015-11-12 09:21:04 -07:00
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clock.c	ARM: tegra210: implement PLLE init procedure from TRM	2015-11-12 09:21:04 -07:00
funcmux.c	ARM: Tegra210: Add SoC code/include files for T210	2015-07-28 10:30:19 -07:00
Kconfig	ARM: tegra: Add p2371-2180 board	2015-09-16 16:10:22 -07:00
Makefile	ARM: Tegra210: Add SoC code/include files for T210	2015-07-28 10:30:19 -07:00
pinmux.c	ARM: tegra: pinctrl: move Tegra210 code to the correct dir	2015-03-30 09:54:06 -07:00
xusb-padctl.c	ARM: Tegra210: Add SoC code/include files for T210	2015-07-28 10:30:19 -07:00