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https://github.com/brain-hackers/u-boot-brain
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21c1502a4a
The HRCW (hardware reset configuration word) is a constant that must be hard-coded into the boot loader image. So, it must be available at compile time, and cannot be migrated to the DT mechanism, but has to be kept in Kconfig. Configuration of this crucial variable should still be somewhat comfortable. Hence, make its fields configurable in Kconfig, and assemble the final value from these. Signed-off-by: Mario Six <mario.six@gdsys.cc>
38 lines
1.2 KiB
C
38 lines
1.2 KiB
C
#ifdef CONFIG_ARCH_MPC8349
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#define TSEC1_MODE_SHIFT 17
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#define TSEC2_MODE_SHIFT 19
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#else
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#define TSEC1_MODE_SHIFT 18
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#define TSEC2_MODE_SHIFT 21
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#endif
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#define CONFIG_SYS_HRCW_LOW (\
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(CONFIG_LBMC_CLOCK_MODE << (31 - 0)) |\
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(CONFIG_DDR_MC_CLOCK_MODE << (31 - 1)) |\
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(CONFIG_SYSTEM_PLL_VCO_DIV << (31 - 3)) |\
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(CONFIG_SYSTEM_PLL_FACTOR << (31 - 7)) |\
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(CONFIG_CORE_PLL_RATIO << (31 - 15)) |\
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(CONFIG_QUICC_VCO_DIVIDER << (31 - 25)) |\
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(CONFIG_QUICC_DIV_FACTOR << (31 - 26)) |\
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(CONFIG_QUICC_MULT_FACTOR << (31 - 31)) \
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)
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#define CONFIG_SYS_HRCW_HIGH (\
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(CONFIG_PCI_HOST_MODE << (31 - 0)) |\
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(CONFIG_PCI_64BIT_MODE << (31 - 1)) |\
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(CONFIG_PCI_INT_ARBITER1 << (31 - 2)) |\
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(CONFIG_PCI_INT_ARBITER2 << (31 - 3)) |\
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(CONFIG_PCI_CLOCK_OUTPUT_DRIVE << (31 - 3)) |\
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(CONFIG_CORE_DISABLE_MODE << (31 - 4)) |\
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(CONFIG_BOOT_MEMORY_SPACE << (31 - 5)) |\
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(CONFIG_BOOT_SEQUENCER << (31 - 7)) |\
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(CONFIG_SOFTWARE_WATCHDOG << (31 - 8)) |\
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(CONFIG_BOOT_ROM_INTERFACE << (31 - 13)) |\
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(CONFIG_TSEC1_MODE << (31 - TSEC1_MODE_SHIFT)) |\
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(CONFIG_TSEC2_MODE << (31 - TSEC2_MODE_SHIFT)) |\
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(CONFIG_SECONDARY_DDR_IO << (31 - 27)) |\
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(CONFIG_TRUE_LITTLE_ENDIAN << (31 - 28)) |\
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(CONFIG_LALE_TIMING << (31 - 29)) |\
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(CONFIG_LDP_PIN_MUX_STATE << (31 - 30)) \
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)
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