mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-28 21:09:00 +09:00
![Biwen Li](/assets/img/avatar_default.png)
Read PFE ESBC header flash with spi_flash_read API - logs as follows, Net: SF: Detected s25fs512s with page size 256 Bytes, erase size 256 KiB, total 64 MiB "Synchronous Abort" handler, esr 0x96000210 elr: 000000008206db44 lr : 0000000082004ea0 (reloc) elr: 00000000b7ba6b44 lr : 00000000b7b3dea0 x0 : 00000000b79407e8 x1 : 0000000040640000 x2 : 0000000000000050 x3 : 0000000000000000 x4 : 000000000000000a x5 : 0000000000000050 x6 : 0000000000000366 x7 : 00000000b7942308 x8 : 00000000b76407c0 x9 : 0000000000000008 x10: 0000000000000044 x11: 00000000b7634d1c x12: 000000000000004f x13: 0000000000000044 x14: 00000000b7634d98 x15: 00000000b76407c0 x16: 0000000000000000 x17: 0000000000000000 x18: 00000000b7636dd8 x19: 0000000000000000 x20: 00000000b79407d0 x21: 00000000b79407e8 x22: 0000000040640000 x23: 00000000b7634e58 x24: 0000000000000000 x25: 0000000003800000 x26: 00000000b7bdd000 x27: 0000000000000000 x28: 0000000000000000 x29: 00000000b7634d10 Code: d2800003 eb03005f 54000101 d65f03c0 (f8636826) Resetting CPU ... Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
125 lines
2.0 KiB
Plaintext
125 lines
2.0 KiB
Plaintext
if TARGET_LS1012ARDB
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config SYS_BOARD
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default "ls1012ardb"
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config SYS_VENDOR
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default "freescale"
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config SYS_SOC
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default "fsl-layerscape"
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config SYS_CONFIG_NAME
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default "ls1012ardb"
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config SYS_LS_PPA_FW_ADDR
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hex "PPA Firmware Addr"
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default 0x40400000
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if CHAIN_OF_TRUST
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config SYS_LS_PPA_ESBC_ADDR
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hex "PPA Firmware HDR Addr"
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default 0x40680000
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config SYS_LS_PFE_ESBC_ADDR
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hex "PFE Firmware HDR Addr"
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default 0x40640000
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config SYS_LS_PFE_ESBC_LENGTH
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hex "length of PFE Firmware HDR"
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default 0xc00
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endif
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if FSL_PFE
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select PHYLIB
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imply PHY_REALTEK
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config SYS_LS_PFE_FW_ADDR
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hex "Flash address of PFE firmware"
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default 0x40a00000
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config SYS_LS_PFE_FW_LENGTH
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hex "length of PFE firmware"
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default 0x300000
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config DDR_PFE_PHYS_BASEADDR
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hex "PFE DDR physical base address"
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default 0x03800000
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config DDR_PFE_BASEADDR
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hex "PFE DDR base address"
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default 0x83800000
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config PFE_EMAC1_PHY_ADDR
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hex "PFE DDR base address"
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default 0x2
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config PFE_EMAC2_PHY_ADDR
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hex "PFE DDR base address"
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default 0x1
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endif
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source "board/freescale/common/Kconfig"
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endif
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if TARGET_LS1012A2G5RDB
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config SYS_BOARD
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default "ls1012ardb"
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config SYS_VENDOR
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default "freescale"
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config SYS_SOC
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default "fsl-layerscape"
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config SYS_CONFIG_NAME
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default "ls1012a2g5rdb"
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config SYS_LS_PPA_FW_ADDR
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hex "PPA Firmware Addr"
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default 0x40400000
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if FSL_PFE
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select PHYLIB
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imply PHYLIB_10G
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imply PHY_AQUANTIA
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config SYS_LS_PFE_FW_ADDR
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hex "Flash address of PFE firmware"
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default 0x40a00000
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config SYS_LS_PFE_FW_LENGTH
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hex "length of PFE firmware"
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default 0x300000
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config DDR_PFE_PHYS_BASEADDR
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hex "PFE DDR physical base address"
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default 0x03800000
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config DDR_PFE_BASEADDR
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hex "PFE DDR base address"
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default 0x83800000
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config PFE_EMAC1_PHY_ADDR
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hex "PFE DDR base address"
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default 0x2
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config PFE_EMAC2_PHY_ADDR
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hex "PFE DDR base address"
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default 0x1
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endif
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source "board/freescale/common/Kconfig"
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endif
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