25 lines
407 B
C
25 lines
407 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* (C) Copyright 2015 Google, Inc
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*/
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#ifndef _ASM_ARCH_DDR_RK3188_H
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#define _ASM_ARCH_DDR_RK3188_H
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#include <asm/arch-rockchip/ddr_rk3288.h>
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/*
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* RK3188 Memory scheduler register map.
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*/
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struct rk3188_msch {
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u32 coreid;
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u32 revisionid;
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u32 ddrconf;
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u32 ddrtiming;
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u32 ddrmode;
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u32 readlatency;
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};
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check_member(rk3188_msch, readlatency, 0x0014);
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#endif
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