mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-15 06:33:45 +09:00
![Tom Rini](/assets/img/avatar_default.png)
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
615 lines
18 KiB
C
615 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2014 Freescale Semiconductor
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*/
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#include <asm/arch/clock.h>
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#include "qbman_portal.h"
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/* QBMan portal management command codes */
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#define QBMAN_MC_ACQUIRE 0x30
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#define QBMAN_WQCHAN_CONFIGURE 0x46
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/* CINH register offsets */
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#define QBMAN_CINH_SWP_EQAR 0x8c0
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#define QBMAN_CINH_SWP_DCAP 0xac0
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#define QBMAN_CINH_SWP_SDQCR 0xb00
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#define QBMAN_CINH_SWP_RAR 0xcc0
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/* CENA register offsets */
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#define QBMAN_CENA_SWP_EQCR(n) (0x000 + ((uint32_t)(n) << 6))
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#define QBMAN_CENA_SWP_DQRR(n) (0x200 + ((uint32_t)(n) << 6))
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#define QBMAN_CENA_SWP_RCR(n) (0x400 + ((uint32_t)(n) << 6))
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#define QBMAN_CENA_SWP_CR 0x600
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#define QBMAN_CENA_SWP_RR(vb) (0x700 + ((uint32_t)(vb) >> 1))
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#define QBMAN_CENA_SWP_VDQCR 0x780
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/* Reverse mapping of QBMAN_CENA_SWP_DQRR() */
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#define QBMAN_IDX_FROM_DQRR(p) (((unsigned long)p & 0x1ff) >> 6)
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/*******************************/
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/* Pre-defined attribute codes */
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/*******************************/
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struct qb_attr_code code_generic_verb = QB_CODE(0, 0, 7);
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struct qb_attr_code code_generic_rslt = QB_CODE(0, 8, 8);
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/*************************/
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/* SDQCR attribute codes */
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/*************************/
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/* we put these here because at least some of them are required by
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* qbman_swp_init() */
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struct qb_attr_code code_sdqcr_dct = QB_CODE(0, 24, 2);
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struct qb_attr_code code_sdqcr_fc = QB_CODE(0, 29, 1);
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struct qb_attr_code code_sdqcr_tok = QB_CODE(0, 16, 8);
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#define CODE_SDQCR_DQSRC(n) QB_CODE(0, n, 1)
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enum qbman_sdqcr_dct {
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qbman_sdqcr_dct_null = 0,
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qbman_sdqcr_dct_prio_ics,
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qbman_sdqcr_dct_active_ics,
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qbman_sdqcr_dct_active
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};
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enum qbman_sdqcr_fc {
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qbman_sdqcr_fc_one = 0,
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qbman_sdqcr_fc_up_to_3 = 1
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};
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/*********************************/
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/* Portal constructor/destructor */
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/*********************************/
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/* Software portals should always be in the power-on state when we initialise,
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* due to the CCSR-based portal reset functionality that MC has. */
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struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
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{
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int ret;
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struct qbman_swp *p = malloc(sizeof(struct qbman_swp));
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u32 major = 0, minor = 0;
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if (!p)
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return NULL;
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p->desc = d;
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#ifdef QBMAN_CHECKING
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p->mc.check = swp_mc_can_start;
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#endif
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p->mc.valid_bit = QB_VALID_BIT;
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p->sdq = 0;
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qb_attr_code_encode(&code_sdqcr_dct, &p->sdq, qbman_sdqcr_dct_prio_ics);
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qb_attr_code_encode(&code_sdqcr_fc, &p->sdq, qbman_sdqcr_fc_up_to_3);
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qb_attr_code_encode(&code_sdqcr_tok, &p->sdq, 0xbb);
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atomic_set(&p->vdq.busy, 1);
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p->vdq.valid_bit = QB_VALID_BIT;
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p->dqrr.next_idx = 0;
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qbman_version(&major, &minor);
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if (!major) {
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printf("invalid qbman version\n");
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return NULL;
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}
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if (major >= 4 && minor >= 1)
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p->dqrr.dqrr_size = QBMAN_VER_4_1_DQRR_SIZE;
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else
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p->dqrr.dqrr_size = QBMAN_VER_4_0_DQRR_SIZE;
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p->dqrr.valid_bit = QB_VALID_BIT;
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ret = qbman_swp_sys_init(&p->sys, d, p->dqrr.dqrr_size);
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if (ret) {
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free(p);
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printf("qbman_swp_sys_init() failed %d\n", ret);
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return NULL;
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}
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qbman_cinh_write(&p->sys, QBMAN_CINH_SWP_SDQCR, p->sdq);
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return p;
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}
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/***********************/
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/* Management commands */
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/***********************/
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/*
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* Internal code common to all types of management commands.
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*/
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void *qbman_swp_mc_start(struct qbman_swp *p)
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{
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void *ret;
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int *return_val;
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#ifdef QBMAN_CHECKING
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BUG_ON(p->mc.check != swp_mc_can_start);
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#endif
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ret = qbman_cena_write_start(&p->sys, QBMAN_CENA_SWP_CR);
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#ifdef QBMAN_CHECKING
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return_val = (int *)ret;
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if (!(*return_val))
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p->mc.check = swp_mc_can_submit;
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#endif
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return ret;
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}
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void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb)
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{
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uint32_t *v = cmd;
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#ifdef QBMAN_CHECKING
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BUG_ON(p->mc.check != swp_mc_can_submit);
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#endif
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lwsync();
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/* TBD: "|=" is going to hurt performance. Need to move as many fields
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* out of word zero, and for those that remain, the "OR" needs to occur
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* at the caller side. This debug check helps to catch cases where the
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* caller wants to OR but has forgotten to do so. */
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BUG_ON((*v & cmd_verb) != *v);
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*v = cmd_verb | p->mc.valid_bit;
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qbman_cena_write_complete(&p->sys, QBMAN_CENA_SWP_CR, cmd);
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/* TODO: add prefetch support for GPP */
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#ifdef QBMAN_CHECKING
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p->mc.check = swp_mc_can_poll;
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#endif
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}
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void *qbman_swp_mc_result(struct qbman_swp *p)
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{
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uint32_t *ret, verb;
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#ifdef QBMAN_CHECKING
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BUG_ON(p->mc.check != swp_mc_can_poll);
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#endif
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ret = qbman_cena_read(&p->sys, QBMAN_CENA_SWP_RR(p->mc.valid_bit));
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/* Remove the valid-bit - command completed iff the rest is non-zero */
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verb = ret[0] & ~QB_VALID_BIT;
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if (!verb)
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return NULL;
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#ifdef QBMAN_CHECKING
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p->mc.check = swp_mc_can_start;
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#endif
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p->mc.valid_bit ^= QB_VALID_BIT;
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return ret;
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}
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/***********/
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/* Enqueue */
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/***********/
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/* These should be const, eventually */
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static struct qb_attr_code code_eq_cmd = QB_CODE(0, 0, 2);
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static struct qb_attr_code code_eq_orp_en = QB_CODE(0, 2, 1);
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static struct qb_attr_code code_eq_tgt_id = QB_CODE(2, 0, 24);
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/* static struct qb_attr_code code_eq_tag = QB_CODE(3, 0, 32); */
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static struct qb_attr_code code_eq_qd_en = QB_CODE(0, 4, 1);
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static struct qb_attr_code code_eq_qd_bin = QB_CODE(4, 0, 16);
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static struct qb_attr_code code_eq_qd_pri = QB_CODE(4, 16, 4);
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static struct qb_attr_code code_eq_rsp_stash = QB_CODE(5, 16, 1);
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static struct qb_attr_code code_eq_rsp_lo = QB_CODE(6, 0, 32);
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enum qbman_eq_cmd_e {
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/* No enqueue, primarily for plugging ORP gaps for dropped frames */
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qbman_eq_cmd_empty,
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/* DMA an enqueue response once complete */
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qbman_eq_cmd_respond,
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/* DMA an enqueue response only if the enqueue fails */
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qbman_eq_cmd_respond_reject
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};
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void qbman_eq_desc_clear(struct qbman_eq_desc *d)
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{
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memset(d, 0, sizeof(*d));
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}
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void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success)
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{
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uint32_t *cl = qb_cl(d);
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qb_attr_code_encode(&code_eq_orp_en, cl, 0);
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qb_attr_code_encode(&code_eq_cmd, cl,
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respond_success ? qbman_eq_cmd_respond :
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qbman_eq_cmd_respond_reject);
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}
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void qbman_eq_desc_set_response(struct qbman_eq_desc *d,
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dma_addr_t storage_phys,
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int stash)
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{
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uint32_t *cl = qb_cl(d);
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qb_attr_code_encode_64(&code_eq_rsp_lo, (uint64_t *)cl, storage_phys);
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qb_attr_code_encode(&code_eq_rsp_stash, cl, !!stash);
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}
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void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, uint32_t qdid,
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uint32_t qd_bin, uint32_t qd_prio)
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{
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uint32_t *cl = qb_cl(d);
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qb_attr_code_encode(&code_eq_qd_en, cl, 1);
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qb_attr_code_encode(&code_eq_tgt_id, cl, qdid);
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qb_attr_code_encode(&code_eq_qd_bin, cl, qd_bin);
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qb_attr_code_encode(&code_eq_qd_pri, cl, qd_prio);
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}
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#define EQAR_IDX(eqar) ((eqar) & 0x7)
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#define EQAR_VB(eqar) ((eqar) & 0x80)
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#define EQAR_SUCCESS(eqar) ((eqar) & 0x100)
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int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
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const struct qbman_fd *fd)
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{
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uint32_t *p;
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const uint32_t *cl = qb_cl(d);
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uint32_t eqar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_EQAR);
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debug("EQAR=%08x\n", eqar);
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if (!EQAR_SUCCESS(eqar))
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return -EBUSY;
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p = qbman_cena_write_start(&s->sys,
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QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
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word_copy(&p[1], &cl[1], 7);
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word_copy(&p[8], fd, sizeof(*fd) >> 2);
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lwsync();
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/* Set the verb byte, have to substitute in the valid-bit */
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p[0] = cl[0] | EQAR_VB(eqar);
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qbman_cena_write_complete(&s->sys,
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QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)),
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p);
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return 0;
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}
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/***************************/
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/* Volatile (pull) dequeue */
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/***************************/
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/* These should be const, eventually */
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static struct qb_attr_code code_pull_dct = QB_CODE(0, 0, 2);
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static struct qb_attr_code code_pull_dt = QB_CODE(0, 2, 2);
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static struct qb_attr_code code_pull_rls = QB_CODE(0, 4, 1);
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static struct qb_attr_code code_pull_stash = QB_CODE(0, 5, 1);
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static struct qb_attr_code code_pull_numframes = QB_CODE(0, 8, 4);
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static struct qb_attr_code code_pull_token = QB_CODE(0, 16, 8);
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static struct qb_attr_code code_pull_dqsource = QB_CODE(1, 0, 24);
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static struct qb_attr_code code_pull_rsp_lo = QB_CODE(2, 0, 32);
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enum qb_pull_dt_e {
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qb_pull_dt_channel,
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qb_pull_dt_workqueue,
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qb_pull_dt_framequeue
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};
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void qbman_pull_desc_clear(struct qbman_pull_desc *d)
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{
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memset(d, 0, sizeof(*d));
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}
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void qbman_pull_desc_set_storage(struct qbman_pull_desc *d,
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struct ldpaa_dq *storage,
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dma_addr_t storage_phys,
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int stash)
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{
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uint32_t *cl = qb_cl(d);
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/* Squiggle the pointer 'storage' into the extra 2 words of the
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* descriptor (which aren't copied to the hw command) */
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*(void **)&cl[4] = storage;
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if (!storage) {
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qb_attr_code_encode(&code_pull_rls, cl, 0);
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return;
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}
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qb_attr_code_encode(&code_pull_rls, cl, 1);
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qb_attr_code_encode(&code_pull_stash, cl, !!stash);
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qb_attr_code_encode_64(&code_pull_rsp_lo, (uint64_t *)cl, storage_phys);
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}
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void qbman_pull_desc_set_numframes(struct qbman_pull_desc *d, uint8_t numframes)
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{
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uint32_t *cl = qb_cl(d);
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BUG_ON(!numframes || (numframes > 16));
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qb_attr_code_encode(&code_pull_numframes, cl,
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(uint32_t)(numframes - 1));
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}
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void qbman_pull_desc_set_token(struct qbman_pull_desc *d, uint8_t token)
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{
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uint32_t *cl = qb_cl(d);
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qb_attr_code_encode(&code_pull_token, cl, token);
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}
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void qbman_pull_desc_set_fq(struct qbman_pull_desc *d, uint32_t fqid)
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{
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uint32_t *cl = qb_cl(d);
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qb_attr_code_encode(&code_pull_dct, cl, 1);
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qb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_framequeue);
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qb_attr_code_encode(&code_pull_dqsource, cl, fqid);
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}
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int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)
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{
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uint32_t *p;
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uint32_t *cl = qb_cl(d);
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if (!atomic_dec_and_test(&s->vdq.busy)) {
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atomic_inc(&s->vdq.busy);
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return -EBUSY;
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}
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s->vdq.storage = *(void **)&cl[4];
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s->vdq.token = qb_attr_code_decode(&code_pull_token, cl);
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p = qbman_cena_write_start(&s->sys, QBMAN_CENA_SWP_VDQCR);
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word_copy(&p[1], &cl[1], 3);
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lwsync();
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/* Set the verb byte, have to substitute in the valid-bit */
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p[0] = cl[0] | s->vdq.valid_bit;
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s->vdq.valid_bit ^= QB_VALID_BIT;
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qbman_cena_write_complete(&s->sys, QBMAN_CENA_SWP_VDQCR, p);
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return 0;
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}
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/****************/
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/* Polling DQRR */
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/****************/
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static struct qb_attr_code code_dqrr_verb = QB_CODE(0, 0, 8);
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static struct qb_attr_code code_dqrr_response = QB_CODE(0, 0, 7);
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static struct qb_attr_code code_dqrr_stat = QB_CODE(0, 8, 8);
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#define QBMAN_DQRR_RESPONSE_DQ 0x60
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#define QBMAN_DQRR_RESPONSE_FQRN 0x21
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#define QBMAN_DQRR_RESPONSE_FQRNI 0x22
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#define QBMAN_DQRR_RESPONSE_FQPN 0x24
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#define QBMAN_DQRR_RESPONSE_FQDAN 0x25
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#define QBMAN_DQRR_RESPONSE_CDAN 0x26
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#define QBMAN_DQRR_RESPONSE_CSCN_MEM 0x27
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#define QBMAN_DQRR_RESPONSE_CGCU 0x28
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#define QBMAN_DQRR_RESPONSE_BPSCN 0x29
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#define QBMAN_DQRR_RESPONSE_CSCN_WQ 0x2a
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/* NULL return if there are no unconsumed DQRR entries. Returns a DQRR entry
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* only once, so repeated calls can return a sequence of DQRR entries, without
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* requiring they be consumed immediately or in any particular order. */
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const struct ldpaa_dq *qbman_swp_dqrr_next(struct qbman_swp *s)
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{
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uint32_t verb;
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uint32_t response_verb;
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uint32_t flags;
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const struct ldpaa_dq *dq;
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const uint32_t *p;
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dq = qbman_cena_read(&s->sys, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
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p = qb_cl(dq);
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verb = qb_attr_code_decode(&code_dqrr_verb, p);
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/* If the valid-bit isn't of the expected polarity, nothing there. Note,
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* in the DQRR reset bug workaround, we shouldn't need to skip these
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* check, because we've already determined that a new entry is available
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* and we've invalidated the cacheline before reading it, so the
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* valid-bit behaviour is repaired and should tell us what we already
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* knew from reading PI.
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*/
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if ((verb & QB_VALID_BIT) != s->dqrr.valid_bit) {
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qbman_cena_invalidate_prefetch(&s->sys,
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QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
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return NULL;
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}
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/* There's something there. Move "next_idx" attention to the next ring
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* entry (and prefetch it) before returning what we found. */
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s->dqrr.next_idx++;
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s->dqrr.next_idx &= s->dqrr.dqrr_size - 1;/* Wrap around at dqrr_size */
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/* TODO: it's possible to do all this without conditionals, optimise it
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* later. */
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if (!s->dqrr.next_idx)
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s->dqrr.valid_bit ^= QB_VALID_BIT;
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/* If this is the final response to a volatile dequeue command
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indicate that the vdq is no longer busy */
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flags = ldpaa_dq_flags(dq);
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response_verb = qb_attr_code_decode(&code_dqrr_response, &verb);
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if ((response_verb == QBMAN_DQRR_RESPONSE_DQ) &&
|
|
(flags & LDPAA_DQ_STAT_VOLATILE) &&
|
|
(flags & LDPAA_DQ_STAT_EXPIRED))
|
|
atomic_inc(&s->vdq.busy);
|
|
|
|
qbman_cena_invalidate_prefetch(&s->sys,
|
|
QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
|
|
return dq;
|
|
}
|
|
|
|
/* Consume DQRR entries previously returned from qbman_swp_dqrr_next(). */
|
|
void qbman_swp_dqrr_consume(struct qbman_swp *s, const struct ldpaa_dq *dq)
|
|
{
|
|
qbman_cinh_write(&s->sys, QBMAN_CINH_SWP_DCAP, QBMAN_IDX_FROM_DQRR(dq));
|
|
}
|
|
|
|
/*********************************/
|
|
/* Polling user-provided storage */
|
|
/*********************************/
|
|
|
|
void qbman_dq_entry_set_oldtoken(struct ldpaa_dq *dq,
|
|
unsigned int num_entries,
|
|
uint8_t oldtoken)
|
|
{
|
|
memset(dq, oldtoken, num_entries * sizeof(*dq));
|
|
}
|
|
|
|
int qbman_dq_entry_has_newtoken(struct qbman_swp *s,
|
|
const struct ldpaa_dq *dq,
|
|
uint8_t newtoken)
|
|
{
|
|
/* To avoid converting the little-endian DQ entry to host-endian prior
|
|
* to us knowing whether there is a valid entry or not (and run the
|
|
* risk of corrupting the incoming hardware LE write), we detect in
|
|
* hardware endianness rather than host. This means we need a different
|
|
* "code" depending on whether we are BE or LE in software, which is
|
|
* where DQRR_TOK_OFFSET comes in... */
|
|
static struct qb_attr_code code_dqrr_tok_detect =
|
|
QB_CODE(0, DQRR_TOK_OFFSET, 8);
|
|
/* The user trying to poll for a result treats "dq" as const. It is
|
|
* however the same address that was provided to us non-const in the
|
|
* first place, for directing hardware DMA to. So we can cast away the
|
|
* const because it is mutable from our perspective. */
|
|
uint32_t *p = qb_cl((struct ldpaa_dq *)dq);
|
|
uint32_t token;
|
|
|
|
token = qb_attr_code_decode(&code_dqrr_tok_detect, &p[1]);
|
|
if (token != newtoken)
|
|
return 0;
|
|
|
|
/* Only now do we convert from hardware to host endianness. Also, as we
|
|
* are returning success, the user has promised not to call us again, so
|
|
* there's no risk of us converting the endianness twice... */
|
|
make_le32_n(p, 16);
|
|
|
|
/* VDQCR "no longer busy" hook - not quite the same as DQRR, because the
|
|
* fact "VDQCR" shows busy doesn't mean that the result we're looking at
|
|
* is from the same command. Eg. we may be looking at our 10th dequeue
|
|
* result from our first VDQCR command, yet the second dequeue command
|
|
* could have been kicked off already, after seeing the 1st result. Ie.
|
|
* the result we're looking at is not necessarily proof that we can
|
|
* reset "busy". We instead base the decision on whether the current
|
|
* result is sitting at the first 'storage' location of the busy
|
|
* command. */
|
|
if (s->vdq.storage == dq) {
|
|
s->vdq.storage = NULL;
|
|
atomic_inc(&s->vdq.busy);
|
|
}
|
|
return 1;
|
|
}
|
|
|
|
/********************************/
|
|
/* Categorising dequeue entries */
|
|
/********************************/
|
|
|
|
static inline int __qbman_dq_entry_is_x(const struct ldpaa_dq *dq, uint32_t x)
|
|
{
|
|
const uint32_t *p = qb_cl(dq);
|
|
uint32_t response_verb = qb_attr_code_decode(&code_dqrr_response, p);
|
|
|
|
return response_verb == x;
|
|
}
|
|
|
|
int qbman_dq_entry_is_DQ(const struct ldpaa_dq *dq)
|
|
{
|
|
return __qbman_dq_entry_is_x(dq, QBMAN_DQRR_RESPONSE_DQ);
|
|
}
|
|
|
|
/*********************************/
|
|
/* Parsing frame dequeue results */
|
|
/*********************************/
|
|
|
|
/* These APIs assume qbman_dq_entry_is_DQ() is TRUE */
|
|
|
|
uint32_t ldpaa_dq_flags(const struct ldpaa_dq *dq)
|
|
{
|
|
const uint32_t *p = qb_cl(dq);
|
|
|
|
return qb_attr_code_decode(&code_dqrr_stat, p);
|
|
}
|
|
|
|
const struct dpaa_fd *ldpaa_dq_fd(const struct ldpaa_dq *dq)
|
|
{
|
|
const uint32_t *p = qb_cl(dq);
|
|
|
|
return (const struct dpaa_fd *)&p[8];
|
|
}
|
|
|
|
/******************/
|
|
/* Buffer release */
|
|
/******************/
|
|
|
|
/* These should be const, eventually */
|
|
/* static struct qb_attr_code code_release_num = QB_CODE(0, 0, 3); */
|
|
static struct qb_attr_code code_release_set_me = QB_CODE(0, 5, 1);
|
|
static struct qb_attr_code code_release_bpid = QB_CODE(0, 16, 16);
|
|
|
|
void qbman_release_desc_clear(struct qbman_release_desc *d)
|
|
{
|
|
uint32_t *cl;
|
|
|
|
memset(d, 0, sizeof(*d));
|
|
cl = qb_cl(d);
|
|
qb_attr_code_encode(&code_release_set_me, cl, 1);
|
|
}
|
|
|
|
void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint32_t bpid)
|
|
{
|
|
uint32_t *cl = qb_cl(d);
|
|
|
|
qb_attr_code_encode(&code_release_bpid, cl, bpid);
|
|
}
|
|
|
|
#define RAR_IDX(rar) ((rar) & 0x7)
|
|
#define RAR_VB(rar) ((rar) & 0x80)
|
|
#define RAR_SUCCESS(rar) ((rar) & 0x100)
|
|
|
|
int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d,
|
|
const uint64_t *buffers, unsigned int num_buffers)
|
|
{
|
|
uint32_t *p;
|
|
const uint32_t *cl = qb_cl(d);
|
|
uint32_t rar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_RAR);
|
|
debug("RAR=%08x\n", rar);
|
|
if (!RAR_SUCCESS(rar))
|
|
return -EBUSY;
|
|
BUG_ON(!num_buffers || (num_buffers > 7));
|
|
/* Start the release command */
|
|
p = qbman_cena_write_start(&s->sys,
|
|
QBMAN_CENA_SWP_RCR(RAR_IDX(rar)));
|
|
/* Copy the caller's buffer pointers to the command */
|
|
u64_to_le32_copy(&p[2], buffers, num_buffers);
|
|
lwsync();
|
|
/* Set the verb byte, have to substitute in the valid-bit and the number
|
|
* of buffers. */
|
|
p[0] = cl[0] | RAR_VB(rar) | num_buffers;
|
|
qbman_cena_write_complete(&s->sys,
|
|
QBMAN_CENA_SWP_RCR(RAR_IDX(rar)),
|
|
p);
|
|
return 0;
|
|
}
|
|
|
|
/*******************/
|
|
/* Buffer acquires */
|
|
/*******************/
|
|
|
|
/* These should be const, eventually */
|
|
static struct qb_attr_code code_acquire_bpid = QB_CODE(0, 16, 16);
|
|
static struct qb_attr_code code_acquire_num = QB_CODE(1, 0, 3);
|
|
static struct qb_attr_code code_acquire_r_num = QB_CODE(1, 0, 3);
|
|
|
|
int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers,
|
|
unsigned int num_buffers)
|
|
{
|
|
uint32_t *p;
|
|
uint32_t verb, rslt, num;
|
|
|
|
BUG_ON(!num_buffers || (num_buffers > 7));
|
|
|
|
/* Start the management command */
|
|
p = qbman_swp_mc_start(s);
|
|
|
|
if (!p)
|
|
return -EBUSY;
|
|
|
|
/* Encode the caller-provided attributes */
|
|
qb_attr_code_encode(&code_acquire_bpid, p, bpid);
|
|
qb_attr_code_encode(&code_acquire_num, p, num_buffers);
|
|
|
|
/* Complete the management command */
|
|
p = qbman_swp_mc_complete(s, p, p[0] | QBMAN_MC_ACQUIRE);
|
|
|
|
/* Decode the outcome */
|
|
verb = qb_attr_code_decode(&code_generic_verb, p);
|
|
rslt = qb_attr_code_decode(&code_generic_rslt, p);
|
|
num = qb_attr_code_decode(&code_acquire_r_num, p);
|
|
BUG_ON(verb != QBMAN_MC_ACQUIRE);
|
|
|
|
/* Determine success or failure */
|
|
if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
|
|
printf("Acquire buffers from BPID 0x%x failed, code=0x%02x\n",
|
|
bpid, rslt);
|
|
return -EIO;
|
|
}
|
|
BUG_ON(num > num_buffers);
|
|
/* Copy the acquired buffers to the caller's array */
|
|
u64_from_le32_copy(buffers, &p[2], num);
|
|
return (int)num;
|
|
}
|