mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-25 12:29:44 +09:00
be1d5e0388
rk3036 only 4K size SRAM for SPL, so only support timer, uart, sdram driver in SPL stage, when finish initial sdram, back to bootrom.And in rk3036 sdmmc and debug uart use same iomux, so if you want to boot from sdmmc, you must disable debug uart. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Fixed build error for chromebook_jerry, firefly-rk3288: Signed-off-by: Simon Glass <sjg@chromium.org> Series-changes: 8 - Fix build error for chromebook_jerry, firefly-rk3288
33 lines
507 B
ArmAsm
33 lines
507 B
ArmAsm
/*
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* (C) Copyright 2015 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <linux/linkage.h>
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.globl SAVE_SP_ADDR
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SAVE_SP_ADDR:
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.word 0
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/*
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* void save_boot_params
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*
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* Save sp, lr, r1~r12
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*/
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ENTRY(save_boot_params)
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push {r1-r12, lr}
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ldr r0, =SAVE_SP_ADDR
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str sp, [r0]
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b save_boot_params_ret @ back to my caller
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ENDPROC(save_boot_params)
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.globl back_to_bootrom
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ENTRY(back_to_bootrom)
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ldr r0, =SAVE_SP_ADDR
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ldr sp, [r0]
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mov r0, #0
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pop {r1-r12, pc}
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ENDPROC(back_to_bootrom)
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