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https://github.com/brain-hackers/u-boot-brain
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![Tom Rini](/assets/img/avatar_default.png)
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
175 lines
3.9 KiB
C
175 lines
3.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2014 Hans de Goede <hdegoede@redhat.com>
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*
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* Based on allwinner u-boot sources rsb code which is:
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* (C) Copyright 2007-2013
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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* lixiang <lixiang@allwinnertech.com>
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*/
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#include <common.h>
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#include <errno.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/prcm.h>
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#include <asm/arch/rsb.h>
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static int rsb_set_device_mode(void);
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static void rsb_cfg_io(void)
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{
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#ifdef CONFIG_MACH_SUN8I
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sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_GPL_R_RSB);
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sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_GPL_R_RSB);
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sunxi_gpio_set_pull(SUNXI_GPL(0), 1);
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sunxi_gpio_set_pull(SUNXI_GPL(1), 1);
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sunxi_gpio_set_drv(SUNXI_GPL(0), 2);
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sunxi_gpio_set_drv(SUNXI_GPL(1), 2);
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#elif defined CONFIG_MACH_SUN9I
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sunxi_gpio_set_cfgpin(SUNXI_GPN(0), SUN9I_GPN_R_RSB);
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sunxi_gpio_set_cfgpin(SUNXI_GPN(1), SUN9I_GPN_R_RSB);
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sunxi_gpio_set_pull(SUNXI_GPN(0), 1);
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sunxi_gpio_set_pull(SUNXI_GPN(1), 1);
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sunxi_gpio_set_drv(SUNXI_GPN(0), 2);
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sunxi_gpio_set_drv(SUNXI_GPN(1), 2);
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#else
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#error unsupported MACH_SUNXI
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#endif
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}
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static void rsb_set_clk(void)
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{
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struct sunxi_rsb_reg * const rsb =
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(struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
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u32 div = 0;
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u32 cd_odly = 0;
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/* Source is Hosc24M, set RSB clk to 3Mhz */
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div = 24000000 / 3000000 / 2 - 1;
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cd_odly = div >> 1;
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if (!cd_odly)
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cd_odly = 1;
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writel((cd_odly << 8) | div, &rsb->ccr);
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}
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int rsb_init(void)
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{
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struct sunxi_rsb_reg * const rsb =
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(struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
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/* Enable RSB and PIO clk, and de-assert their resets */
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prcm_apb0_enable(PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_RSB);
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/* Setup external pins */
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rsb_cfg_io();
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writel(RSB_CTRL_SOFT_RST, &rsb->ctrl);
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rsb_set_clk();
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return rsb_set_device_mode();
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}
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static int rsb_await_trans(void)
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{
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struct sunxi_rsb_reg * const rsb =
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(struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
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unsigned long tmo = timer_get_us() + 1000000;
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u32 stat;
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int ret;
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while (1) {
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stat = readl(&rsb->stat);
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if (stat & RSB_STAT_LBSY_INT) {
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ret = -EBUSY;
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break;
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}
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if (stat & RSB_STAT_TERR_INT) {
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ret = -EIO;
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break;
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}
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if (stat & RSB_STAT_TOVER_INT) {
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ret = 0;
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break;
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}
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if (timer_get_us() > tmo) {
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ret = -ETIME;
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break;
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}
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}
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writel(stat, &rsb->stat); /* Clear status bits */
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return ret;
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}
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static int rsb_set_device_mode(void)
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{
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struct sunxi_rsb_reg * const rsb =
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(struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
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unsigned long tmo = timer_get_us() + 1000000;
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writel(RSB_DMCR_DEVICE_MODE_START | RSB_DMCR_DEVICE_MODE_DATA,
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&rsb->dmcr);
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while (readl(&rsb->dmcr) & RSB_DMCR_DEVICE_MODE_START) {
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if (timer_get_us() > tmo)
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return -ETIME;
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}
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return rsb_await_trans();
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}
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static int rsb_do_trans(void)
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{
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struct sunxi_rsb_reg * const rsb =
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(struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
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setbits_le32(&rsb->ctrl, RSB_CTRL_START_TRANS);
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return rsb_await_trans();
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}
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int rsb_set_device_address(u16 device_addr, u16 runtime_addr)
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{
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struct sunxi_rsb_reg * const rsb =
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(struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
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writel(RSB_DEVADDR_RUNTIME_ADDR(runtime_addr) |
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RSB_DEVADDR_DEVICE_ADDR(device_addr), &rsb->devaddr);
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writel(RSB_CMD_SET_RTSADDR, &rsb->cmd);
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return rsb_do_trans();
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}
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int rsb_write(const u16 runtime_device_addr, const u8 reg_addr, u8 data)
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{
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struct sunxi_rsb_reg * const rsb =
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(struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
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writel(RSB_DEVADDR_RUNTIME_ADDR(runtime_device_addr), &rsb->devaddr);
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writel(reg_addr, &rsb->addr);
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writel(data, &rsb->data);
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writel(RSB_CMD_BYTE_WRITE, &rsb->cmd);
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return rsb_do_trans();
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}
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int rsb_read(const u16 runtime_device_addr, const u8 reg_addr, u8 *data)
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{
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struct sunxi_rsb_reg * const rsb =
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(struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
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int ret;
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writel(RSB_DEVADDR_RUNTIME_ADDR(runtime_device_addr), &rsb->devaddr);
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writel(reg_addr, &rsb->addr);
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writel(RSB_CMD_BYTE_READ, &rsb->cmd);
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ret = rsb_do_trans();
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if (ret)
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return ret;
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*data = readl(&rsb->data) & 0xff;
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return 0;
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}
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