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https://github.com/brain-hackers/u-boot-brain
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![Tom Rini](/assets/img/avatar_default.png)
Exactly one board has defined CONFIG_SYS_PROMPT_HUSH_PS2 to a value different than "> " which is vision2. I have Cc'd the maintainer here as I strongly suspect this is a bug rather than intentional behavior. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Stefano Babic <sbabic@denx.de>
203 lines
5.6 KiB
C
203 lines
5.6 KiB
C
/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES).
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/hardware.h>
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#define CONFIG_AT91_LEGACY
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#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
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#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_AT91SAM9M10G45EK
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#define CONFIG_AT91FAMILY
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#define CONFIG_ARCH_CPU_INIT
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_DISPLAY_CPUINFO
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/* general purpose I/O */
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#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
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#define CONFIG_AT91_GPIO
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#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
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/* serial console */
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#define CONFIG_ATMEL_USART
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#define CONFIG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID ATMEL_ID_SYS
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/*
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* This needs to be defined for the OHCI code to work but it is defined as
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* ATMEL_ID_UHPHS in the CPU specific header files.
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*/
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#define ATMEL_ID_UHP ATMEL_ID_UHPHS
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/*
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* Specify the clock enable bit in the PMC_SCER register.
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*/
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#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
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/* LCD */
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#define CONFIG_LCD
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#define LCD_BPP LCD_COLOR8
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#define CONFIG_LCD_LOGO
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#undef LCD_TEST_PATTERN
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#define CONFIG_LCD_INFO
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#define CONFIG_LCD_INFO_BELOW_LOGO
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#define CONFIG_SYS_WHITE_ON_BLACK
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#define CONFIG_ATMEL_LCD
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#define CONFIG_ATMEL_LCD_RGB565
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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/* board specific(not enough SRAM) */
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#define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000
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/* LED */
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#define CONFIG_AT91_LED
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#define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */
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#define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */
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#define CONFIG_BOOTDELAY 3
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_BDI
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_IMI
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#undef CONFIG_CMD_IMLS
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#undef CONFIG_CMD_LOADS
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_USB
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/* SDRAM */
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
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#define CONFIG_SYS_SDRAM_SIZE 0x08000000
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
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/* No NOR flash */
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#define CONFIG_SYS_NO_FLASH
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/* NAND flash */
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_ATMEL
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
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#define CONFIG_SYS_NAND_DBW_8
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/* our ALE is AD21 */
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
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/* our CLE is AD22 */
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
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#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
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#endif
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/* Ethernet */
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#define CONFIG_MACB
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#define CONFIG_RMII
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#define CONFIG_NET_RETRY_COUNT 20
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#define CONFIG_RESET_PHY_R
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/* USB */
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#define CONFIG_USB_ATMEL
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_DOS_PARTITION
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_HCI
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g45"
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#define CONFIG_USB_STORAGE
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#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END 0x23e00000
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/* bootstrap + u-boot + env in nandflash */
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_OFFSET 0x60000
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#define CONFIG_ENV_OFFSET_REDUND 0x80000
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#define CONFIG_ENV_SIZE 0x20000
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#define CONFIG_BOOTCOMMAND "nand read 0x70000000 0x100000 0x200000;" \
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"bootm 0x70000000"
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#define CONFIG_BOOTARGS \
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"console=ttyS0,115200 earlyprintk " \
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"root=/dev/mtdblock5 " \
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"mtdparts=atmel_nand:128k(bootstrap)ro," \
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"256k(uboot)ro,128k(env1)ro,128k(env2)ro," \
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"2M@1M(linux),-(root) " \
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"rw rootfstype=jffs2"
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_PROMPT "U-Boot> "
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_HUSH_PARSER
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
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#define CONFIG_STACKSIZE (32*1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#error CONFIG_USE_IRQ not supported
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#endif
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#endif
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