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3bf9a8e846
At present the generic io{read,write}{8,16,32} routines only support
MMIO access. With architecture like x86 that has a separate IO space,
these routines cannot be used to access I/O ports.
Implement x86-specific version to support both PIO and MMIO access,
so that drivers for multiple architectures can use these accessors
without the need to know whether it's MMIO or PIO.
These are ported from Linux kernel lib/iomap.c, with slight changes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
313 lines
9.3 KiB
C
313 lines
9.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2000-2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*/
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#ifndef _ASM_IO_H
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#define _ASM_IO_H
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#include <linux/compiler.h>
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/*
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* This file contains the definitions for the x86 IO instructions
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* inb/inw/inl/outb/outw/outl and the "string versions" of the same
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* (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
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* versions of the single-IO instructions (inb_p/inw_p/..).
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*
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* This file is not meant to be obfuscating: it's just complicated
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* to (a) handle it all in a way that makes gcc able to optimize it
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* as well as possible and (b) trying to avoid writing the same thing
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* over and over again with slight variations and possibly making a
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* mistake somewhere.
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*/
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/*
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* Thanks to James van Artsdalen for a better timing-fix than
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* the two short jumps: using outb's to a nonexistent port seems
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* to guarantee better timings even on fast machines.
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*
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* On the other hand, I'd like to be sure of a non-existent port:
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* I feel a bit unsafe about using 0x80 (should be safe, though)
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*
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* Linus
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*/
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/*
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* Bit simplified and optimized by Jan Hubicka
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* Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
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*
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* isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
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* isa_read[wl] and isa_write[wl] fixed
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* - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
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*/
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#define IO_SPACE_LIMIT 0xffff
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#include <asm/types.h>
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#ifdef __KERNEL__
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/*
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* readX/writeX() are used to access memory mapped devices. On some
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* architectures the memory mapped IO stuff needs to be accessed
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* differently. On the x86 architecture, we just read/write the
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* memory location directly.
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*/
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#define readb(addr) (*(volatile unsigned char *) (addr))
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#define readw(addr) (*(volatile unsigned short *) (addr))
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#define readl(addr) (*(volatile unsigned int *) (addr))
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#define readq(addr) (*(volatile unsigned long long *) (addr))
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#define __raw_readb readb
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#define __raw_readw readw
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#define __raw_readl readl
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#define __raw_readq readq
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#define writeb(b,addr) (*(volatile unsigned char *) (addr) = (b))
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#define writew(b,addr) (*(volatile unsigned short *) (addr) = (b))
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#define writel(b,addr) (*(volatile unsigned int *) (addr) = (b))
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#define writeq(b,addr) (*(volatile unsigned long long *) (addr) = (b))
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#define __raw_writeb writeb
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#define __raw_writew writew
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#define __raw_writel writel
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#define __raw_writeq writeq
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#define memset_io(a,b,c) memset((a),(b),(c))
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#define memcpy_fromio(a,b,c) memcpy((a),(b),(c))
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#define memcpy_toio(a,b,c) memcpy((a),(b),(c))
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#define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a)
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#define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a))
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#define out_le64(a, v) out_arch(q, le64, a, v)
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#define out_le32(a, v) out_arch(l, le32, a, v)
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#define out_le16(a, v) out_arch(w, le16, a, v)
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#define in_le64(a) in_arch(q, le64, a)
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#define in_le32(a) in_arch(l, le32, a)
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#define in_le16(a) in_arch(w, le16, a)
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#define out_be32(a, v) out_arch(l, be32, a, v)
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#define out_be16(a, v) out_arch(w, be16, a, v)
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#define in_be32(a) in_arch(l, be32, a)
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#define in_be16(a) in_arch(w, be16, a)
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#define out_8(a, v) __raw_writeb(v, a)
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#define in_8(a) __raw_readb(a)
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#define clrbits(type, addr, clear) \
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out_##type((addr), in_##type(addr) & ~(clear))
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#define setbits(type, addr, set) \
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out_##type((addr), in_##type(addr) | (set))
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#define clrsetbits(type, addr, clear, set) \
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out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
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#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
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#define setbits_be32(addr, set) setbits(be32, addr, set)
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#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
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#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
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#define setbits_le32(addr, set) setbits(le32, addr, set)
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#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
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#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
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#define setbits_be16(addr, set) setbits(be16, addr, set)
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#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
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#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
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#define setbits_le16(addr, set) setbits(le16, addr, set)
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#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
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#define clrbits_8(addr, clear) clrbits(8, addr, clear)
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#define setbits_8(addr, set) setbits(8, addr, set)
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#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
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#endif /* __KERNEL__ */
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#ifdef SLOW_IO_BY_JUMPING
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#define __SLOW_DOWN_IO "\njmp 1f\n1:\tjmp 1f\n1:"
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#else
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#define __SLOW_DOWN_IO "\noutb %%al,$0xed"
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#endif
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#ifdef REALLY_SLOW_IO
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#define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO
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#else
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#define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO
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#endif
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/*
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* Talk about misusing macros..
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*/
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#define __OUT1(s,x) \
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static inline void _out##s(unsigned x value, unsigned short port) {
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#define __OUT2(s,s1,s2) \
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__asm__ __volatile__ ("out" #s " %" s1 "0,%" s2 "1"
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#define __OUT(s,s1,x) \
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__OUT1(s,x) __OUT2(s,s1,"w") : : "a" (value), "Nd" (port)); } \
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__OUT1(s##_p,x) __OUT2(s,s1,"w") __FULL_SLOW_DOWN_IO : : "a" (value), "Nd" (port));}
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#define __IN1(s) \
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static inline RETURN_TYPE _in##s(unsigned short port) { RETURN_TYPE _v;
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#define __IN2(s,s1,s2) \
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__asm__ __volatile__ ("in" #s " %" s2 "1,%" s1 "0"
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#define __IN(s,s1,i...) \
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__IN1(s) __IN2(s,s1,"w") : "=a" (_v) : "Nd" (port) ,##i ); return _v; } \
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__IN1(s##_p) __IN2(s,s1,"w") __FULL_SLOW_DOWN_IO : "=a" (_v) : "Nd" (port) ,##i ); return _v; }
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#define __INS(s) \
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static inline void ins##s(unsigned short port, void * addr, unsigned long count) \
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{ __asm__ __volatile__ ("rep ; ins" #s \
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: "=D" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
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#define __OUTS(s) \
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static inline void outs##s(unsigned short port, const void * addr, unsigned long count) \
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{ __asm__ __volatile__ ("rep ; outs" #s \
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: "=S" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
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#define RETURN_TYPE unsigned char
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__IN(b,"")
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#undef RETURN_TYPE
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#define RETURN_TYPE unsigned short
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__IN(w,"")
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#undef RETURN_TYPE
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#define RETURN_TYPE unsigned int
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__IN(l,"")
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#undef RETURN_TYPE
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#define inb(port) _inb((uintptr_t)(port))
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#define inw(port) _inw((uintptr_t)(port))
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#define inl(port) _inl((uintptr_t)(port))
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__OUT(b,"b",char)
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__OUT(w,"w",short)
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__OUT(l,,int)
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#define outb(val, port) _outb(val, (uintptr_t)(port))
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#define outw(val, port) _outw(val, (uintptr_t)(port))
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#define outl(val, port) _outl(val, (uintptr_t)(port))
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__INS(b)
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__INS(w)
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__INS(l)
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__OUTS(b)
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__OUTS(w)
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__OUTS(l)
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/* IO space accessors */
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#define clrio(type, addr, clear) \
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out##type(in##type(addr) & ~(clear), (addr))
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#define setio(type, addr, set) \
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out##type(in##type(addr) | (set), (addr))
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#define clrsetio(type, addr, clear, set) \
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out##type((in##type(addr) & ~(clear)) | (set), (addr))
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#define clrio_32(addr, clear) clrio(l, addr, clear)
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#define clrio_16(addr, clear) clrio(w, addr, clear)
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#define clrio_8(addr, clear) clrio(b, addr, clear)
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#define setio_32(addr, set) setio(l, addr, set)
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#define setio_16(addr, set) setio(w, addr, set)
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#define setio_8(addr, set) setio(b, addr, set)
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#define clrsetio_32(addr, clear, set) clrsetio(l, addr, clear, set)
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#define clrsetio_16(addr, clear, set) clrsetio(w, addr, clear, set)
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#define clrsetio_8(addr, clear, set) clrsetio(b, addr, clear, set)
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static inline void sync(void)
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{
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}
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/*
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* TODO: The kernel offers some more advanced versions of barriers, it might
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* have some advantages to use them instead of the simple one here.
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*/
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#define dmb() __asm__ __volatile__ ("" : : : "memory")
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#define __iormb() dmb()
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#define __iowmb() dmb()
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/*
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* Read/write from/to an (offsettable) iomem cookie. It might be a PIO
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* access or a MMIO access, these functions don't care. The info is
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* encoded in the hardware mapping set up by the mapping functions
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* (or the cookie itself, depending on implementation and hw).
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*
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* The generic routines don't assume any hardware mappings, and just
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* encode the PIO/MMIO as part of the cookie. They coldly assume that
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* the MMIO IO mappings are not in the low address range.
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*
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* Architectures for which this is not true can't use this generic
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* implementation and should do their own copy.
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*/
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/*
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* We assume that all the low physical PIO addresses (0-0xffff) always
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* PIO. That means we can do some sanity checks on the low bits, and
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* don't need to just take things for granted.
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*/
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#define PIO_RESERVED 0x10000UL
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/*
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* Ugly macros are a way of life.
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*/
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#define IO_COND(addr, is_pio, is_mmio) do { \
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unsigned long port = (unsigned long __force)addr; \
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if (port >= PIO_RESERVED) { \
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is_mmio; \
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} else { \
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is_pio; \
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} \
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} while (0)
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static inline u8 ioread8(const volatile void __iomem *addr)
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{
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IO_COND(addr, return inb(port), return readb(addr));
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return 0xff;
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}
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static inline u16 ioread16(const volatile void __iomem *addr)
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{
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IO_COND(addr, return inw(port), return readw(addr));
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return 0xffff;
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}
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static inline u32 ioread32(const volatile void __iomem *addr)
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{
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IO_COND(addr, return inl(port), return readl(addr));
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return 0xffffffff;
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}
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static inline void iowrite8(u8 value, volatile void __iomem *addr)
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{
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IO_COND(addr, outb(value, port), writeb(value, addr));
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}
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static inline void iowrite16(u16 value, volatile void __iomem *addr)
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{
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IO_COND(addr, outw(value, port), writew(value, addr));
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}
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static inline void iowrite32(u32 value, volatile void __iomem *addr)
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{
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IO_COND(addr, outl(value, port), writel(value, addr));
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}
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#include <asm-generic/io.h>
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#endif /* _ASM_IO_H */
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