mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 10:46:15 +09:00
01aa9d1d54
This patch adds pinctrl support for MT7629 SoC. The IO core found on the SoC has the registers for pinctrl, pinconf and gpio mixed up in the same register range. Hence the driver also implements the gpio functionality through UCLASS_GPIO. This also creates a common file as there might be other chips that use the same binding and driver, then being a little more abstract could help in the long run. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org>
25 lines
853 B
Makefile
25 lines
853 B
Makefile
# SPDX-License-Identifier: GPL-2.0+
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obj-y += pinctrl-uclass.o
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obj-$(CONFIG_$(SPL_)PINCTRL_GENERIC) += pinctrl-generic.o
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obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o
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obj-$(CONFIG_PINCTRL_AT91PIO4) += pinctrl-at91-pio4.o
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obj-y += nxp/
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obj-$(CONFIG_ARCH_ASPEED) += aspeed/
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obj-$(CONFIG_ARCH_ATH79) += ath79/
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obj-$(CONFIG_ARCH_RMOBILE) += renesas/
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obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
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obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o
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obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/
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obj-$(CONFIG_PINCTRL_PIC32) += pinctrl_pic32.o
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obj-$(CONFIG_PINCTRL_EXYNOS) += exynos/
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obj-$(CONFIG_PINCTRL_MESON) += meson/
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obj-$(CONFIG_PINCTRL_MTK) += mediatek/
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obj-$(CONFIG_ARCH_MVEBU) += mvebu/
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obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
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obj-$(CONFIG_PINCTRL_STI) += pinctrl-sti.o
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obj-$(CONFIG_PINCTRL_STM32) += pinctrl_stm32.o
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obj-y += broadcom/
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