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![Haavard Skinnemoen](/assets/img/avatar_default.png)
This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de>
476 lines
14 KiB
C
476 lines
14 KiB
C
/*
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* (C) Copyright 2002 SIXNET, dge@sixnetio.com.
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*
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* (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
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* Stephan Linz <linz@li-pro.net>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* Date & Time support for DS1306 RTC using SPI:
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*
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* - SXNI855T: it uses its own soft SPI here in this file
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* - all other: use the external spi_xfer() function
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* (see include/spi.h)
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*/
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#include <common.h>
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#include <command.h>
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#include <rtc.h>
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#include <spi.h>
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#if defined(CONFIG_RTC_DS1306) && defined(CONFIG_CMD_DATE)
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#define RTC_SECONDS 0x00
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#define RTC_MINUTES 0x01
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#define RTC_HOURS 0x02
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#define RTC_DAY_OF_WEEK 0x03
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#define RTC_DATE_OF_MONTH 0x04
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#define RTC_MONTH 0x05
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#define RTC_YEAR 0x06
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#define RTC_SECONDS_ALARM0 0x07
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#define RTC_MINUTES_ALARM0 0x08
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#define RTC_HOURS_ALARM0 0x09
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#define RTC_DAY_OF_WEEK_ALARM0 0x0a
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#define RTC_SECONDS_ALARM1 0x0b
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#define RTC_MINUTES_ALARM1 0x0c
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#define RTC_HOURS_ALARM1 0x0d
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#define RTC_DAY_OF_WEEK_ALARM1 0x0e
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#define RTC_CONTROL 0x0f
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#define RTC_STATUS 0x10
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#define RTC_TRICKLE_CHARGER 0x11
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#define RTC_USER_RAM_BASE 0x20
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static unsigned int bin2bcd (unsigned int n);
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static unsigned char bcd2bin (unsigned char c);
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/* ************************************************************************* */
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#ifdef CONFIG_SXNI855T /* !!! SHOULD BE CHANGED TO NEW CODE !!! */
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static void soft_spi_send (unsigned char n);
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static unsigned char soft_spi_read (void);
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static void init_spi (void);
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/*-----------------------------------------------------------------------
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* Definitions
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*/
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#define PB_SPISCK 0x00000002 /* PB 30 */
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#define PB_SPIMOSI 0x00000004 /* PB 29 */
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#define PB_SPIMISO 0x00000008 /* PB 28 */
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#define PB_SPI_CE 0x00010000 /* PB 15 */
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/* ------------------------------------------------------------------------- */
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/* read clock time from DS1306 and return it in *tmp */
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int rtc_get (struct rtc_time *tmp)
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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unsigned char spi_byte; /* Data Byte */
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init_spi (); /* set port B for software SPI */
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/* Now we can enable the DS1306 RTC */
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immap->im_cpm.cp_pbdat |= PB_SPI_CE;
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udelay (10);
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/* Shift out the address (0) of the time in the Clock Chip */
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soft_spi_send (0);
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/* Put the clock readings into the rtc_time structure */
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tmp->tm_sec = bcd2bin (soft_spi_read ()); /* Read seconds */
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tmp->tm_min = bcd2bin (soft_spi_read ()); /* Read minutes */
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/* Hours are trickier */
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spi_byte = soft_spi_read (); /* Read Hours into temporary value */
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if (spi_byte & 0x40) {
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/* 12 hour mode bit is set (time is in 1-12 format) */
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if (spi_byte & 0x20) {
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/* since PM we add 11 to get 0-23 for hours */
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tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) + 11;
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} else {
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/* since AM we subtract 1 to get 0-23 for hours */
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tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) - 1;
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}
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} else {
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/* Otherwise, 0-23 hour format */
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tmp->tm_hour = (bcd2bin (spi_byte & 0x3F));
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}
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soft_spi_read (); /* Read and discard Day of week */
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tmp->tm_mday = bcd2bin (soft_spi_read ()); /* Read Day of the Month */
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tmp->tm_mon = bcd2bin (soft_spi_read ()); /* Read Month */
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/* Read Year and convert to this century */
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tmp->tm_year = bcd2bin (soft_spi_read ()) + 2000;
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/* Now we can disable the DS1306 RTC */
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immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
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udelay (10);
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GregorianDay (tmp); /* Determine the day of week */
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debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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return 0;
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}
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/* ------------------------------------------------------------------------- */
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/* set clock time in DS1306 RTC and in MPC8xx RTC */
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void rtc_set (struct rtc_time *tmp)
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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init_spi (); /* set port B for software SPI */
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/* Now we can enable the DS1306 RTC */
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immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */
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udelay (10);
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/* First disable write protect in the clock chip control register */
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soft_spi_send (0x8F); /* send address of the control register */
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soft_spi_send (0x00); /* send control register contents */
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/* Now disable the DS1306 to terminate the write */
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immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;
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udelay (10);
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/* Now enable the DS1306 to initiate a new write */
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immap->im_cpm.cp_pbdat |= PB_SPI_CE;
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udelay (10);
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/* Next, send the address of the clock time write registers */
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soft_spi_send (0x80); /* send address of the first time register */
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/* Use Burst Mode to send all of the time data to the clock */
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bin2bcd (tmp->tm_sec);
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soft_spi_send (bin2bcd (tmp->tm_sec)); /* Send Seconds */
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soft_spi_send (bin2bcd (tmp->tm_min)); /* Send Minutes */
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soft_spi_send (bin2bcd (tmp->tm_hour)); /* Send Hour */
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soft_spi_send (bin2bcd (tmp->tm_wday)); /* Send Day of the Week */
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soft_spi_send (bin2bcd (tmp->tm_mday)); /* Send Day of Month */
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soft_spi_send (bin2bcd (tmp->tm_mon)); /* Send Month */
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soft_spi_send (bin2bcd (tmp->tm_year - 2000)); /* Send Year */
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/* Now we can disable the Clock chip to terminate the burst write */
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immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
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udelay (10);
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/* Now we can enable the Clock chip to initiate a new write */
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immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */
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udelay (10);
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/* First we Enable write protect in the clock chip control register */
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soft_spi_send (0x8F); /* send address of the control register */
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soft_spi_send (0x40); /* send out Control Register contents */
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/* Now disable the DS1306 */
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immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
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udelay (10);
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/* Set standard MPC8xx clock to the same time so Linux will
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* see the time even if it doesn't have a DS1306 clock driver.
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* This helps with experimenting with standard kernels.
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*/
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{
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ulong tim;
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tim = mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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immap->im_sitk.sitk_rtck = KAPWR_KEY;
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immap->im_sit.sit_rtc = tim;
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}
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debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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}
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/* ------------------------------------------------------------------------- */
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/* Initialize Port B for software SPI */
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static void init_spi (void)
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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/* Force output pins to begin at logic 0 */
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immap->im_cpm.cp_pbdat &= ~(PB_SPI_CE | PB_SPIMOSI | PB_SPISCK);
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/* Set these 3 signals as outputs */
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immap->im_cpm.cp_pbdir |= (PB_SPIMOSI | PB_SPI_CE | PB_SPISCK);
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immap->im_cpm.cp_pbdir &= ~PB_SPIMISO; /* Make MISO pin an input */
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udelay (10);
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}
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/* ------------------------------------------------------------------------- */
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/* NOTE: soft_spi_send() assumes that the I/O lines are configured already */
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static void soft_spi_send (unsigned char n)
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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unsigned char bitpos; /* bit position to receive */
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unsigned char i; /* Loop Control */
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/* bit position to send, start with most significant bit */
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bitpos = 0x80;
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/* Send 8 bits to software SPI */
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for (i = 0; i < 8; i++) { /* Loop for 8 bits */
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immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */
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if (n & bitpos)
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immap->im_cpm.cp_pbdat |= PB_SPIMOSI; /* Set MOSI to 1 */
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else
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immap->im_cpm.cp_pbdat &= ~PB_SPIMOSI; /* Set MOSI to 0 */
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udelay (10);
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immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
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udelay (10);
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bitpos >>= 1; /* Shift for next bit position */
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}
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}
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/* ------------------------------------------------------------------------- */
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/* NOTE: soft_spi_read() assumes that the I/O lines are configured already */
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static unsigned char soft_spi_read (void)
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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unsigned char spi_byte = 0; /* Return value, assume success */
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unsigned char bitpos; /* bit position to receive */
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unsigned char i; /* Loop Control */
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/* bit position to receive, start with most significant bit */
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bitpos = 0x80;
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/* Read 8 bits here */
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for (i = 0; i < 8; i++) { /* Do 8 bits in loop */
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immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */
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udelay (10);
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if (immap->im_cpm.cp_pbdat & PB_SPIMISO) /* Get a bit of data */
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spi_byte |= bitpos; /* Set data accordingly */
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immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
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udelay (10);
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bitpos >>= 1; /* Shift for next bit position */
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}
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return spi_byte; /* Return the byte read */
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}
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/* ------------------------------------------------------------------------- */
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void rtc_reset (void)
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{
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return; /* nothing to do */
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}
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#else /* not CONFIG_SXNI855T */
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/* ************************************************************************* */
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static unsigned char rtc_read (unsigned char reg);
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static void rtc_write (unsigned char reg, unsigned char val);
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static struct spi_slave *slave;
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/* read clock time from DS1306 and return it in *tmp */
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int rtc_get (struct rtc_time *tmp)
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{
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unsigned char sec, min, hour, mday, wday, mon, year;
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/*
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* Assuming Vcc = 2.0V (lowest speed)
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*
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* REVISIT: If we add an rtc_init() function we can do this
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* step just once.
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*/
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if (!slave) {
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slave = spi_setup_slave(0, CFG_SPI_RTC_DEVID, 600000,
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SPI_MODE_3 | SPI_CS_HIGH);
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if (!slave)
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return;
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}
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if (spi_claim_bus(slave))
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return;
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sec = rtc_read (RTC_SECONDS);
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min = rtc_read (RTC_MINUTES);
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hour = rtc_read (RTC_HOURS);
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mday = rtc_read (RTC_DATE_OF_MONTH);
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wday = rtc_read (RTC_DAY_OF_WEEK);
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mon = rtc_read (RTC_MONTH);
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year = rtc_read (RTC_YEAR);
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spi_release_bus(slave);
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debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
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"hr: %02x min: %02x sec: %02x\n",
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year, mon, mday, wday, hour, min, sec);
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debug ("Alarms[0]: wday: %02x hour: %02x min: %02x sec: %02x\n",
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rtc_read (RTC_DAY_OF_WEEK_ALARM0),
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rtc_read (RTC_HOURS_ALARM0),
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rtc_read (RTC_MINUTES_ALARM0), rtc_read (RTC_SECONDS_ALARM0));
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debug ("Alarms[1]: wday: %02x hour: %02x min: %02x sec: %02x\n",
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rtc_read (RTC_DAY_OF_WEEK_ALARM1),
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rtc_read (RTC_HOURS_ALARM1),
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rtc_read (RTC_MINUTES_ALARM1), rtc_read (RTC_SECONDS_ALARM1));
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tmp->tm_sec = bcd2bin (sec & 0x7F); /* convert Seconds */
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tmp->tm_min = bcd2bin (min & 0x7F); /* convert Minutes */
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/* convert Hours */
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tmp->tm_hour = (hour & 0x40)
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? ((hour & 0x20) /* 12 hour mode */
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? bcd2bin (hour & 0x1F) + 11 /* PM */
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: bcd2bin (hour & 0x1F) - 1 /* AM */
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)
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: bcd2bin (hour & 0x3F); /* 24 hour mode */
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tmp->tm_mday = bcd2bin (mday & 0x3F); /* convert Day of the Month */
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tmp->tm_mon = bcd2bin (mon & 0x1F); /* convert Month */
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tmp->tm_year = bcd2bin (year) + 2000; /* convert Year */
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tmp->tm_wday = bcd2bin (wday & 0x07) - 1; /* convert Day of the Week */
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tmp->tm_yday = 0;
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tmp->tm_isdst = 0;
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debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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return 0;
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}
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/* ------------------------------------------------------------------------- */
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/* set clock time from *tmp in DS1306 RTC */
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void rtc_set (struct rtc_time *tmp)
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{
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/* Assuming Vcc = 2.0V (lowest speed) */
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if (!slave) {
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slave = spi_setup_slave(0, CFG_SPI_RTC_DEVID, 600000,
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SPI_MODE_3 | SPI_CS_HIGH);
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if (!slave)
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return;
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}
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if (spi_claim_bus(slave))
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return;
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debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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rtc_write (RTC_SECONDS, bin2bcd (tmp->tm_sec));
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rtc_write (RTC_MINUTES, bin2bcd (tmp->tm_min));
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rtc_write (RTC_HOURS, bin2bcd (tmp->tm_hour));
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rtc_write (RTC_DAY_OF_WEEK, bin2bcd (tmp->tm_wday + 1));
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rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday));
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rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon));
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rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000));
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spi_release_bus(slave);
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}
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/* ------------------------------------------------------------------------- */
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/* reset the DS1306 */
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void rtc_reset (void)
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{
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/* Assuming Vcc = 2.0V (lowest speed) */
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if (!slave) {
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slave = spi_setup_slave(0, CFG_SPI_RTC_DEVID, 600000,
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SPI_MODE_3 | SPI_CS_HIGH);
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if (!slave)
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return;
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}
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|
|
|
if (spi_claim_bus(slave))
|
|
return;
|
|
|
|
/* clear the control register */
|
|
rtc_write (RTC_CONTROL, 0x00); /* 1st step: reset WP */
|
|
rtc_write (RTC_CONTROL, 0x00); /* 2nd step: reset 1Hz, AIE1, AIE0 */
|
|
|
|
/* reset all alarms */
|
|
rtc_write (RTC_SECONDS_ALARM0, 0x00);
|
|
rtc_write (RTC_SECONDS_ALARM1, 0x00);
|
|
rtc_write (RTC_MINUTES_ALARM0, 0x00);
|
|
rtc_write (RTC_MINUTES_ALARM1, 0x00);
|
|
rtc_write (RTC_HOURS_ALARM0, 0x00);
|
|
rtc_write (RTC_HOURS_ALARM1, 0x00);
|
|
rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00);
|
|
rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00);
|
|
|
|
spi_release_bus(slave);
|
|
}
|
|
|
|
/* ------------------------------------------------------------------------- */
|
|
|
|
static unsigned char rtc_read (unsigned char reg)
|
|
{
|
|
int ret;
|
|
|
|
ret = spi_w8r8(slave, reg);
|
|
return ret < 0 ? 0 : ret;
|
|
}
|
|
|
|
/* ------------------------------------------------------------------------- */
|
|
|
|
static void rtc_write (unsigned char reg, unsigned char val)
|
|
{
|
|
unsigned char dout[2]; /* SPI Output Data Bytes */
|
|
unsigned char din[2]; /* SPI Input Data Bytes */
|
|
|
|
dout[0] = 0x80 | reg;
|
|
dout[1] = val;
|
|
|
|
spi_xfer (slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END);
|
|
}
|
|
|
|
#endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */
|
|
|
|
/* ------------------------------------------------------------------------- */
|
|
|
|
static unsigned char bcd2bin (unsigned char n)
|
|
{
|
|
return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
|
|
}
|
|
|
|
/* ------------------------------------------------------------------------- */
|
|
|
|
static unsigned int bin2bcd (unsigned int n)
|
|
{
|
|
return (((n / 10) << 4) | (n % 10));
|
|
}
|
|
/* ------------------------------------------------------------------------- */
|
|
|
|
#endif
|