mirror of
https://github.com/brain-hackers/u-boot-brain
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323d1f9d5b
Before this commit, the Kconfig menu in mach-uniphier only allowed us
to choose one SoC to be compiled. Each SoC has its own defconfig file
for the build-test coverage. Consequently, some defconfig files are
duplicated with only the difference in CONFIG_DEFAULT_DEVICE_TREE and
CONFIG_{SOC_NAME}=y.
Now, most of board-specific parameters have been moved to device trees,
so it makes sense to include init code of multiple SoCs into a single
image as long as the SoCs have similar architecture. In fact, some
SoCs of UniPhier family are very similar:
- PH1-LD4 and PH1-sLD8
- PH1-LD6b and ProXstream2 (will be added in the upcoming commit)
This commit will be helpful to merge some defconfig files for better
maintainability.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
58 lines
1.3 KiB
C
58 lines
1.3 KiB
C
/*
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* Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <linux/io.h>
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#include <mach/init.h>
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#include <mach/sc-regs.h>
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void ph1_pro4_clk_init(void)
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{
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u32 tmp;
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/* deassert reset */
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tmp = readl(SC_RSTCTRL);
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#ifdef CONFIG_USB_XHCI_UNIPHIER
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tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 |
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SC_RSTCTRL_NRST_GIO;
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#endif
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#ifdef CONFIG_UNIPHIER_ETH
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tmp |= SC_RSTCTRL_NRST_ETHER;
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#endif
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#ifdef CONFIG_USB_EHCI_UNIPHIER
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tmp |= SC_RSTCTRL_NRST_STDMAC;
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#endif
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#ifdef CONFIG_NAND_DENALI
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tmp |= SC_RSTCTRL_NRST_NAND;
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#endif
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writel(tmp, SC_RSTCTRL);
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readl(SC_RSTCTRL); /* dummy read */
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#ifdef CONFIG_USB_XHCI_UNIPHIER
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tmp = readl(SC_RSTCTRL2);
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tmp |= SC_RSTCTRL2_NRST_USB3B1 | SC_RSTCTRL2_NRST_USB3C1;
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writel(tmp, SC_RSTCTRL2);
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readl(SC_RSTCTRL2); /* dummy read */
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#endif
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/* privide clocks */
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tmp = readl(SC_CLKCTRL);
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#ifdef CONFIG_USB_XHCI_UNIPHIER
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tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
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SC_CLKCTRL_CEN_GIO;
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#endif
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#ifdef CONFIG_UNIPHIER_ETH
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tmp |= SC_CLKCTRL_CEN_ETHER;
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#endif
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#ifdef CONFIG_USB_EHCI_UNIPHIER
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tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
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#endif
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#ifdef CONFIG_NAND_DENALI
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tmp |= SC_CLKCTRL_CEN_NAND;
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#endif
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writel(tmp, SC_CLKCTRL);
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readl(SC_CLKCTRL); /* dummy read */
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}
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