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https://github.com/brain-hackers/u-boot-brain
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d3eb317ea5
Although layerscape platforms reuse mxc_get_clock() of i.MX platforms, eSDHC clock getting do not have to use it. It uses global data gd->arch.sdhc_clk directly in fsl_esdhc driver. Even there are more than one eSDHC controllers on SoC, they use same reference clock. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
26 lines
485 B
C
26 lines
485 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2015 Freescale Semiconductor, Inc.
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* Copyright 2019 NXP Semiconductors
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*
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*/
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#ifndef __ASM_ARCH_FSL_LAYERSCAPE_CLOCK_H_
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#define __ASM_ARCH_FSL_LAYERSCAPE_CLOCK_H_
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#include <common.h>
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enum mxc_clock {
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MXC_ARM_CLK = 0,
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MXC_BUS_CLK,
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MXC_UART_CLK,
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MXC_I2C_CLK,
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MXC_DSPI_CLK,
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};
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unsigned int mxc_get_clock(enum mxc_clock clk);
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ulong get_ddr_freq(ulong);
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uint get_svr(void);
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#endif /* __ASM_ARCH_FSL_LAYERSCAPE_CLOCK_H_ */
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