mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-30 16:40:44 +09:00
135aa95002
The following changes are made to the clock API: * The concept of "clocks" and "peripheral clocks" are unified; each clock provider now implements a single set of clocks. This provides a simpler conceptual interface to clients, and better aligns with device tree clock bindings. * Clocks are now identified with a single "struct clk", rather than requiring clients to store the clock provider device and clock identity values separately. For simple clock consumers, this isolates clients from internal details of the clock API. * clk.h is split so it only contains the client/consumer API, whereas clk-uclass.h contains the provider API. This aligns with the recently added reset and mailbox APIs. * clk_ops .of_xlate(), .request(), and .free() are added so providers can customize these operations if needed. This also aligns with the recently added reset and mailbox APIs. * clk_disable() is added. * All users of the current clock APIs are updated. * Sandbox clock tests are updated to exercise clock lookup via DT, and clock enable/disable. * rkclk_get_clk() is removed and replaced with standard APIs. Buildman shows no clock-related errors for any board for which buildman can download a toolchain. test/py passes for sandbox (which invokes the dm clk test amongst others). Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
108 lines
2.1 KiB
C
108 lines
2.1 KiB
C
/*
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* (C) Copyright 2015 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#include <common.h>
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#include <clk-uclass.h>
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#include <dm.h>
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#include <errno.h>
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#include <asm/clk.h>
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struct sandbox_clk_priv {
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ulong rate[SANDBOX_CLK_ID_COUNT];
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bool enabled[SANDBOX_CLK_ID_COUNT];
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};
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static ulong sandbox_clk_get_rate(struct clk *clk)
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{
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struct sandbox_clk_priv *priv = dev_get_priv(clk->dev);
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if (clk->id < 0 || clk->id >= SANDBOX_CLK_ID_COUNT)
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return -EINVAL;
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return priv->rate[clk->id];
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}
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static ulong sandbox_clk_set_rate(struct clk *clk, ulong rate)
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{
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struct sandbox_clk_priv *priv = dev_get_priv(clk->dev);
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ulong old_rate;
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if (clk->id < 0 || clk->id >= SANDBOX_CLK_ID_COUNT)
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return -EINVAL;
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if (!rate)
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return -EINVAL;
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old_rate = priv->rate[clk->id];
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priv->rate[clk->id] = rate;
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return old_rate;
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}
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static int sandbox_clk_enable(struct clk *clk)
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{
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struct sandbox_clk_priv *priv = dev_get_priv(clk->dev);
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if (clk->id < 0 || clk->id >= SANDBOX_CLK_ID_COUNT)
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return -EINVAL;
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priv->enabled[clk->id] = true;
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return 0;
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}
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static int sandbox_clk_disable(struct clk *clk)
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{
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struct sandbox_clk_priv *priv = dev_get_priv(clk->dev);
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if (clk->id < 0 || clk->id >= SANDBOX_CLK_ID_COUNT)
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return -EINVAL;
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priv->enabled[clk->id] = false;
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return 0;
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}
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static struct clk_ops sandbox_clk_ops = {
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.get_rate = sandbox_clk_get_rate,
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.set_rate = sandbox_clk_set_rate,
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.enable = sandbox_clk_enable,
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.disable = sandbox_clk_disable,
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};
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static const struct udevice_id sandbox_clk_ids[] = {
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{ .compatible = "sandbox,clk" },
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{ }
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};
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U_BOOT_DRIVER(clk_sandbox) = {
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.name = "clk_sandbox",
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.id = UCLASS_CLK,
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.of_match = sandbox_clk_ids,
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.ops = &sandbox_clk_ops,
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.priv_auto_alloc_size = sizeof(struct sandbox_clk_priv),
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};
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ulong sandbox_clk_query_rate(struct udevice *dev, int id)
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{
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struct sandbox_clk_priv *priv = dev_get_priv(dev);
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if (id < 0 || id >= SANDBOX_CLK_ID_COUNT)
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return -EINVAL;
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return priv->rate[id];
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}
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int sandbox_clk_query_enable(struct udevice *dev, int id)
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{
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struct sandbox_clk_priv *priv = dev_get_priv(dev);
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if (id < 0 || id >= SANDBOX_CLK_ID_COUNT)
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return -EINVAL;
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return priv->enabled[id];
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}
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