Vadim Bendebury 1350f1cce1 x86: Provide a way to throttle port80 accesses ... Some systems (like Google Link device) provide the ability to keep a history of the target CPU port80 accesses, which is extremely handy for debugging. The problem is that the EC handling port 80 access is orders of magnitude slower than the AP. This causes random loss of trace data. This change allows to throttle port 80 accesses such that in case the AP is trying to post faster than the EC can handle, a delay is introduced to make sure that the post rate is throttled. Experiments have shown that on Link the delay should be at least 350,000 of tsc clocks. Throttling is not being enabled by default: to enable it one would have to set MIN_PORT80_KCLOCKS_DELAY to something like 400 and rebuild the u-boot image. With upcoming EC code optimizations this number could be decreased (new new value should be established experimentally). Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>		2012-12-06 14:30:43 -08:00
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coreboot	x86: Provide a way to throttle port80 accesses	2012-12-06 14:30:43 -08:00
sc520	sc520: fix build warning about unused temp var	2012-03-06 21:05:18 +11:00
config.mk	Convert ISO-8859 files to UTF-8	2011-08-04 23:34:02 +02:00
cpu.c	x86: Add basic cache operations	2012-12-06 14:30:39 -08:00
interrupts.c	x86: Provide tick counter and frequency reference for Intel core architecture	2012-12-06 14:30:43 -08:00
Makefile	x86: Add a dummy implementation for timer_get_us	2012-11-30 13:44:05 -08:00
resetvec.S	Convert ISO-8859 files to UTF-8	2011-08-04 23:34:02 +02:00
start16.S	x86: Add back cold- and warm-boot flags	2012-12-06 14:30:42 -08:00
start.S	x86: Add back cold- and warm-boot flags	2012-12-06 14:30:42 -08:00
timer.c	x86: Add a dummy implementation for timer_get_us	2012-11-30 13:44:05 -08:00
u-boot.lds	x86: Allow excluding reset vector code from u-boot	2012-11-28 11:40:03 -08:00