York Sun 133fbfa9e6 powerpc/mpc85xx: Add workaround for erratum A006379 ... Erratum A006379 says CPCHDBCR0 bit field [10:14] has incorrect default value after POR. The workaround is to set this field before enabling CPC to 0x1e. Erratum A006379 applies to T4240 rev 1.0 B4860 rev 1.0, 2.0 Signed-off-by: York Sun <yorksun@freescale.com>		2013-10-16 16:15:17 -07:00
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arm	Coding Style cleanup: drop some excessive empty lines	2013-10-14 16:06:54 -04:00
avr32	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
blackfin	Coding Style cleanup: replace leading SPACEs by TABs	2013-10-14 16:06:54 -04:00
m68k	Coding Style cleanup: replace leading SPACEs by TABs	2013-10-14 16:06:54 -04:00
microblaze	microblaze: Fix watchdog initialization	2013-10-16 09:24:38 -04:00
mips	Coding Style cleanup: remove trailing white space	2013-10-14 16:06:53 -04:00
nds32	nds32: introduce DMA allocation API	2013-08-09 01:51:11 +08:00
nios2	Coding Style cleanup: replace leading SPACEs by TABs	2013-10-14 16:06:54 -04:00
openrisc	Coding Style cleanup: replace leading SPACEs by TABs	2013-10-14 16:06:54 -04:00
powerpc	powerpc/mpc85xx: Add workaround for erratum A006379	2013-10-16 16:15:17 -07:00
sandbox	Coding Style cleanup: remove trailing white space	2013-10-14 16:06:53 -04:00
sh	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
sparc	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
x86	Coding Style cleanup: remove trailing white space	2013-10-14 16:06:53 -04:00
.gitignore	update include/asm/ gitignore after move	2010-05-07 00:17:30 +02:00