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![Tom Rini](/assets/img/avatar_default.png)
As per the author, we don't need this patch really since the other patch
"stm32f4: fix serial output" superseded it.
This reverts commit 85e5f5b7a7
.
Signed-off-by: Tom Rini <trini@konsulko.com>
166 lines
3.6 KiB
C
166 lines
3.6 KiB
C
/*
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* (C) Copyright 2015
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* Kamil Lulko, <rev13@wp.pl>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <serial.h>
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#include <asm/arch/stm32.h>
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/*
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* Set up the usart port
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*/
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#if (CONFIG_STM32_USART >= 1) && (CONFIG_STM32_USART <= 6)
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#define USART_PORT (CONFIG_STM32_USART - 1)
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#else
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#define USART_PORT 0
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#endif
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/*
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* Set up the usart base address
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*
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* --STM32_USARTD_BASE means default setting
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*/
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#define STM32_USART1_BASE (STM32_APB2PERIPH_BASE + 0x1000)
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#define STM32_USART2_BASE (STM32_APB1PERIPH_BASE + 0x4400)
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#define STM32_USART3_BASE (STM32_APB1PERIPH_BASE + 0x4800)
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#define STM32_USART6_BASE (STM32_APB2PERIPH_BASE + 0x1400)
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#define STM32_USARTD_BASE STM32_USART1_BASE
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/*
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* RCC USART specific definitions
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*
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* --RCC_ENR_USARTDEN means default setting
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*/
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#define RCC_ENR_USART1EN (1 << 4)
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#define RCC_ENR_USART2EN (1 << 17)
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#define RCC_ENR_USART3EN (1 << 18)
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#define RCC_ENR_USART6EN (1 << 5)
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#define RCC_ENR_USARTDEN RCC_ENR_USART1EN
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struct stm32_serial {
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u32 sr;
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u32 dr;
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u32 brr;
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u32 cr1;
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u32 cr2;
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u32 cr3;
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u32 gtpr;
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};
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#define USART_CR1_RE (1 << 2)
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#define USART_CR1_TE (1 << 3)
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#define USART_CR1_UE (1 << 13)
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#define USART_SR_FLAG_RXNE (1 << 5)
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#define USART_SR_FLAG_TXE (1 << 7)
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#define USART_BRR_F_MASK 0xF
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#define USART_BRR_M_SHIFT 4
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#define USART_BRR_M_MASK 0xFFF0
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DECLARE_GLOBAL_DATA_PTR;
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static const unsigned long usart_base[] = {
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STM32_USART1_BASE,
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STM32_USART2_BASE,
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STM32_USART3_BASE,
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STM32_USARTD_BASE,
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STM32_USARTD_BASE,
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STM32_USART6_BASE
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};
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static const unsigned long rcc_enr_en[] = {
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RCC_ENR_USART1EN,
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RCC_ENR_USART2EN,
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RCC_ENR_USART3EN,
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RCC_ENR_USARTDEN,
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RCC_ENR_USARTDEN,
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RCC_ENR_USART6EN
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};
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static void stm32_serial_setbrg(void)
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{
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serial_init();
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}
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static int stm32_serial_init(void)
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{
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struct stm32_serial *usart =
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(struct stm32_serial *)usart_base[USART_PORT];
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u32 clock, int_div, frac_div, tmp;
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if ((usart_base[USART_PORT] & STM32_BUS_MASK) ==
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STM32_APB1PERIPH_BASE) {
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setbits_le32(&STM32_RCC->apb1enr, rcc_enr_en[USART_PORT]);
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clock = clock_get(CLOCK_APB1);
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} else if ((usart_base[USART_PORT] & STM32_BUS_MASK) ==
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STM32_APB2PERIPH_BASE) {
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setbits_le32(&STM32_RCC->apb2enr, rcc_enr_en[USART_PORT]);
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clock = clock_get(CLOCK_APB2);
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} else {
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return -1;
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}
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int_div = (25 * clock) / (4 * gd->baudrate);
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tmp = ((int_div / 100) << USART_BRR_M_SHIFT) & USART_BRR_M_MASK;
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frac_div = int_div - (100 * (tmp >> USART_BRR_M_SHIFT));
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tmp |= (((frac_div * 16) + 50) / 100) & USART_BRR_F_MASK;
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writel(tmp, &usart->brr);
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setbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
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return 0;
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}
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static int stm32_serial_getc(void)
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{
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struct stm32_serial *usart =
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(struct stm32_serial *)usart_base[USART_PORT];
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while ((readl(&usart->sr) & USART_SR_FLAG_RXNE) == 0)
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;
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return readl(&usart->dr);
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}
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static void stm32_serial_putc(const char c)
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{
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struct stm32_serial *usart =
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(struct stm32_serial *)usart_base[USART_PORT];
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while ((readl(&usart->sr) & USART_SR_FLAG_TXE) == 0)
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;
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writel(c, &usart->dr);
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}
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static int stm32_serial_tstc(void)
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{
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struct stm32_serial *usart =
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(struct stm32_serial *)usart_base[USART_PORT];
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u8 ret;
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ret = readl(&usart->sr) & USART_SR_FLAG_RXNE;
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return ret;
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}
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static struct serial_device stm32_serial_drv = {
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.name = "stm32_serial",
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.start = stm32_serial_init,
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.stop = NULL,
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.setbrg = stm32_serial_setbrg,
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.putc = stm32_serial_putc,
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.puts = default_serial_puts,
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.getc = stm32_serial_getc,
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.tstc = stm32_serial_tstc,
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};
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void stm32_serial_initialize(void)
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{
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serial_register(&stm32_serial_drv);
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}
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__weak struct serial_device *default_serial_console(void)
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{
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return &stm32_serial_drv;
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}
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